P89CV51RC2FA NXP Semiconductors, P89CV51RC2FA Datasheet - Page 26

• Manufacturer Part Number: P89CV51RC2FA
• Description: MCU 8-Bit 89C 80C51 CISC 32KB Flash 5V 44-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89CV51RC2FA

• Package: 44PLCC
• Device Core: 80C51
• Family Name: 89C
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/UART
• Number Of Timers: 3
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
P89CV51RB2_RC2_RD2_3
Product data sheet
6.4 Timers/counters 0 and 1
Table 12.
The two 16-bit timer/counter registers: Timer 0 and Timer 1 can be configured to operate
either as timers or event counters (see
In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one can
think of it as counting machine cycles. Since a machine cycle consists of six oscillator
periods, the count rate is
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T0 or T1. In this function, the external input is sampled
once every machine cycle.
When the samples show a HIGH in one cycle and a LOW in the next cycle, the count is
incremented. The new count value appears in the register in the machine cycle following
the one in which the transition was detected. Since it takes two machine cycles
(12 oscillator periods) for a 1-to-0 transition to be recognized, the maximum count rate is
1
input signal, but to ensure that a given level is sampled at least once before it changes, it
should be held for at least one full machine cycle. In addition to the ‘Timer’ or ‘Counter’
selection, Timer 0 and Timer 1 have four selectable operating modes.
IAP function
Program status bit, boot vector,
6 /12 bit
Read security bits, status bit, boot
vector
Erase page
12
of the oscillator frequency. There are no restrictions on the duty cycle of the external
IAP function calls
Rev. 03 — 25 August 2009
1
6
of the oscillator frequency.
…continued
IAP call parameters
Input parameters:
R1 = 06H or 86H (WDT feed)
DPL = 00H = program status bit
DPL = 01H = program boot vector
DPL = 02H = 6 /12 bit
ACC = boot vector value to program
Return parameter(s):
ACC = 00: pass
ACC is not 00: fail
Input parameters:
ACC = 07H or 87H (WDT feed)
DPL = 00H = security bits
DPL = 01H = status bit
DPL = 02H = boot vector
Return parameter(s):
ACC = 00 SoftICE S/N-match 0 SB 0 DBL_CLK
Input parameters:
R1 = 08H or 88H (WDT feed)
DPH = page address high byte
DPL = page address low byte
Return parameter(s):
ACC = 00: pass
ACC is not 00: fail
Table 13
P89CV51RB2/RC2/RD2
and
Table
14).
80C51 with 1 kB RAM, SPI
© NXP B.V. 2009. All rights reserved.
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