N25Q128A13BSF40G NUMONYX, N25Q128A13BSF40G Datasheet - Page 163
N25Q128A13BSF40G
Manufacturer Part Number
N25Q128A13BSF40G
Description
SERIAL NOR
Manufacturer
NUMONYX
Datasheet
1.N25Q128A13BSF40G.pdf
(180 pages)
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Figure 99. Power-up timing, Fast POR selected
Figure 100. Power-up timing, Fast POR not selected
Table 26.
1. These parameters are characterized only.
V
V
V
V
Symbol
CC
CC
t
t
t
CC
CC
DTW
V
VTW
VTR
(max)
(min)
WI
(max)
(min)
V
(1)
(1)
(1)
(1)
V
Vcc
WI
Vcc
WI
V
Time delay to write instruction when Fast POR is selected
V
Write inhibit voltage
Power-up timing and V
Chip
reset
CC
CC
Chip
reset
Chip selection not allowed
Chip selection not allowed
(min) to Read when Fast POR is selected
(min) to device fully accessible
Parameter
WI
Polling allowed
SPI protocol
threshold
WIP = 1
WEL = 0
t
VTR
t
VTW
Polling allowed
SPI protocol
WIP = 1
WEL = 0
= t
VTR
All read, WRCR,
WRECR allowed
+ t
WIP = 0
WEL = 0
DTW
Starting protocol defined by NVCR
WREN issued
Starting protocol defined by NVCR
WIP = 1
WEL = 1
Polling
allowed
t
DTW
Device fully accessible
Min
1.5
WIP = 0
WEL = 0
Device fully accessible
WIP = 0
WEL = 1
Max
100
500
600
2.5
time
163/180
time
Unit
µs
µs
µs
V
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