N25Q128A13BSF40G NUMONYX, N25Q128A13BSF40G Datasheet - Page 135
N25Q128A13BSF40G
Manufacturer Part Number
N25Q128A13BSF40G
Description
SERIAL NOR
Manufacturer
NUMONYX
Datasheet
1.N25Q128A13BSF40G.pdf
(180 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
N25Q128A13BSF40G
Manufacturer:
MICRON
Quantity:
15 000
Company:
Part Number:
N25Q128A13BSF40G
Manufacturer:
Numonyx
Quantity:
18 000
- Current page: 135 of 180
- Download datasheet (6Mb)
9.3.4
DQ0
DQ3
DQ1
DQ2
C
S
Figure 72. Read OTP instruction and data-out sequence QIO-SPI
Write Enable (WREN)
The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit. Apart form the
parallelizing of the instruction code on the four pins DQ0, DQ1, DQ2 and DQ3, the
instruction functionality is exactly the same as the Write Enable instruction of the Extended
SPI protocol, please refer to
Figure 73. Write Enable instruction sequence QIO-SPI
Instruction
0
1
5
4
6
7
2
DQ0
DQ3
DQ1
DQ2
S
C
1
0
2
3
3
5
4
6
7
4
Section 9.1.9: Write Enable (WREN)
1
0
2
3
5
5
4
6
7
6
Instruction
1
0
2
3
7
0
Quad_Write_Enable
8
1
9 10
Dummy (ex.: 10)
15 16 17 18
5
4
6
7
out 1
Data
1
19
0
3
2
20
4
5
7
for further details.
out n
6
Data
1
21
0
3
2
Quad_Read_OTP
22
4
5
7
6
23
0
1
3
2
135/180
Related parts for N25Q128A13BSF40G
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer:
Numonyx
Datasheet:
Part Number:
Description:
Numonyx™ Embedded Flash Memory J3 V. D
Manufacturer:
Numonyx
Datasheet:
Part Number:
Description:
Manufacturer:
NUMONYX
Datasheet:
Part Number:
Description:
Manufacturer:
NUMONYX
Datasheet: