TMC2111AR3C Fairchild Semiconductor, TMC2111AR3C Datasheet - Page 4

• Manufacturer Part Number: TMC2111AR3C
• Description: Video ICs Shift Register Variable Length
• Manufacturer: Fairchild Semiconductor
• Type: Variable Length Shift Registerr

Specifications of TMC2111AR3C

• Operating Supply Voltage: - 0.5 V to + 7 V
• Supply Current: 30 mA
• Maximum Operating Temperature: 70 C
• Package / Case: PLCC-28
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Package Type: PLCC
• Pin Count: 28
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Descriptions – TMC2111A
Table 1. Programming Length Controls
TMC2011A/2111A
4
Pin Name
Power
V
GND
Data Inputs
DI
Data Outputs
DO
Controls
CLK
L
L
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
3-0
DD
3
7-0
7-0
Input Code
L
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
12,11,10,
13,14,15,
16,21,22,
19,20,6,5
9,4,3,2,1
L
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
17,18
23,24
1
DIP
7
8
Pin Number
L
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
10,5,4,3,2
14,13,12,
15,16,17,
18,26,27,
23,24,7,6
20,21,22
PLCC
28,1
DO
8
9
3-0
10
11
12
13
14
15
16
17
18
3
4
5
6
7
8
9
Length
Mode (MC) =0
Pin Function Description
Supply Voltage. The TMC2111A operates from a single +5V supply. All
power and ground lines must be connected.
Ground. The TMC2111A operates from a single +5V supply. All power
and ground lines must be connected.
Data Input. Eight inputs are provided for the data, which pass through the
shift register unchanged. The TMC2111A consists of a single group of
eight bits with all data bits having equal delays.
Data Output. The outputs of the shift register are delayed relative to the
input signals. The amount of the delay is programmable (see Table 1).
The outputs remain valid for a minimum of t
leading edge of CLK. This allow the data to be latched into circuits with
non-zero hold time requirements.
Master Clock. All inputs and outputs are synchronous and operate from a
single master clock. All operations occur on the rising edge of the master
clock.
Length Select. The length select input is used to determine the register
delay of the TMC2111A. This input is registered and affects the output t
after the clock edge after it is input to the device (see Timing Diagram).
Delay lengths are specified in Table 1.
DO
7-4
10
11
12
13
14
15
16
17
18
3
4
5
6
7
8
9
Length
TMC2011A
DO
3-0
10
11
12
13
14
15
16
17
18
3
4
5
6
7
8
9
Length
Mode (MC) =1
DO
HO
7-4
nanoseconds after the
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
Length
PRODUCT SPECIFICATION
DO
TMC2111A
7-0
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Length
DO