RFD14N05SM9A Fairchild Semiconductor, RFD14N05SM9A Datasheet

MOSFET N-CH 50V 14A DPAK

RFD14N05SM9A

Manufacturer Part Number
RFD14N05SM9A
Description
MOSFET N-CH 50V 14A DPAK
Manufacturer
Fairchild Semiconductor
Type
Power MOSFETr
Datasheet

Specifications of RFD14N05SM9A

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
100 mOhm @ 14A, 10V
Drain To Source Voltage (vdss)
50V
Current - Continuous Drain (id) @ 25° C
14A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
40nC @ 20V
Input Capacitance (ciss) @ Vds
570pF @ 25V
Power - Max
48W
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Number Of Elements
1
Polarity
N
Channel Mode
Enhancement
Drain-source On-res
0.1Ohm
Drain-source On-volt
50V
Gate-source Voltage (max)
±20V
Drain Current (max)
14A
Power Dissipation
48W
Output Power (max)
Not RequiredW
Frequency (max)
Not RequiredMHz
Noise Figure
Not RequireddB
Power Gain
Not RequireddB
Drain Efficiency
Not Required%
Operating Temp Range
-55C to 175C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
2 +Tab
Package Type
DPAK
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.1 Ohms
Drain-source Breakdown Voltage
50 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
14 A
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
RFD14N05SM9A

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©2002 Fairchild Semiconductor Corporation
14A, 50V, 0.100 Ohm, N-Channel Power
MOSFETs
These are N-channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA09770.
Ordering Information
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05SM9A.
Packaging
RFD14N05
RFD14N05SM
RFP14N05
PART NUMBER
DRAIN (FLANGE)
TO-251AA
TO-252AA
TO-220AB
JEDEC TO-251AA
PACKAGE
Data Sheet
SOURCE
F14N05
F14N05
RFP14N05
DRAIN
GATE
DRAIN (FLANGE)
BRAND
JEDEC TO-220AB
RFD14N05, RFD14N05SM, RFP14N05
Features
• 14A, 50V
• r
• Temperature Compensating PSPICE
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175
• Related Literature
Symbol
- TB334 “Guidelines for Soldering Surface Mount
DS(ON)
Components to PC Boards”
o
C Operating Temperature
SOURCE
January 2002
DRAIN
= 0.100 Ω
SOURCE
GATE
GATE
JEDEC TO-252AA
G
RFD14N05, RFD14N05SM, RFP14N05 Rev. B
DRAIN (FLANGE)
D
S
®
Model

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RFD14N05SM9A Summary of contents

Page 1

... RFD14N05 TO-251AA RFD14N05SM TO-252AA RFP14N05 TO-220AB NOTE: When ordering, use the entire part number. Add the suffi obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05SM9A. Packaging JEDEC TO-251AA DRAIN (FLANGE) ©2002 Fairchild Semiconductor Corporation RFD14N05, RFD14N05SM, RFP14N05 Features • ...

Page 2

... Diode Reverse Recovery Time NOTES: 2. Pulse Test: Pulse Width ≤ 300ms, Duty Cycle ≤ 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current Capability Curve (Figure 5). ©2002 Fairchild Semiconductor Corporation Unless Otherwise Specifi Unless Otherwise Specifi ...

Page 3

... FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 100 10 OPERATION IN THIS AREA MAY BE LIMITED BY r DS(ON DRAIN TO SOURCE VOLTAGE (V) DS FIGURE 4. FORWARD BIAS SAFE OPERATING AREA ©2002 Fairchild Semiconductor Corporation Unless Otherwise Specifi 125 175 150 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT ...

Page 4

... V , GATE TO SOURCE VOLTAGE (V) GS FIGURE 8. TRANSFER CHARACTERISTICS 2 250µ 1.5 1.0 0.5 0 -80 - JUNCTION TEMPERATURE ( J FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE ©2002 Fairchild Semiconductor Corporation Unless Otherwise Specified (Continued + - -55 C 175 FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN 120 160 200 ...

Page 5

... DRAIN TO SOURCE VOLTAGE (V) DS FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE Test Circuits and Waveforms VARY t TO OBTAIN P R REQUIRED PEAK FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. SWITCHING TIME TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation Unless Otherwise Specified (Continued 0V 1MHz ISS RSS GD ≈ OSS NOTE: Refer to Fairchild Application Notes AN7254 and AN7260, FIGURE 13 ...

Page 6

... Test Circuits and Waveforms G(REF) FIGURE 18. GATE CHARGE TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation (Continued DUT G(REF g(TOT g(10 10V GS Q g(TH) FIGURE 19. GATE CHARGE WAVEFORMS RFD14N05, RFD14N05SM, RFP14N05 Rev 20V GS ...

Page 7

... S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.75 VOFF= -2.25) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. ©2002 Fairchild Semiconductor Corporation DPLCAP 10 RSCL2 ...

Page 8

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FAST Bottomless™ FASTr™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DenseTrench™ ...

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