FQD3N50CTM Fairchild Semiconductor, FQD3N50CTM Datasheet

FQD3N50CTM

Manufacturer Part Number

FQD3N50CTM

Description

MOSFET N-CH 500V 2.5A DPAK

Manufacturer

Fairchild Semiconductor

Series

QFET™r

Datasheet

1.FQU3N50CTU.pdf (9 pages)

Specifications of FQD3N50CTM

Fet Type

MOSFET N-Channel, Metal Oxide

Fet Feature

Standard

Rds On (max) @ Id, Vgs

2.5 Ohm @ 1.25A, 10V

Drain To Source Voltage (vdss)

500V

Current - Continuous Drain (id) @ 25° C

2.5A

Vgs(th) (max) @ Id

4V @ 250µA

Gate Charge (qg) @ Vgs

13nC @ 10V

Input Capacitance (ciss) @ Vds

365pF @ 25V

Power - Max

35W

Mounting Type

Surface Mount

Package / Case

DPak, TO-252 (2 leads+tab), SC-63

Configuration

Single

Transistor Polarity

N-Channel

Resistance Drain-source Rds (on)

2.1 Ohms

Forward Transconductance Gfs (max / Min)

1.5 S

Drain-source Breakdown Voltage

500 V

Gate-source Breakdown Voltage

+/- 30 V

Continuous Drain Current

2.5 A

Power Dissipation

34 W

Maximum Operating Temperature

+ 150 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 55 C

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Euro Chip Distribution

Part Number:

FQD3N50CTM

Quantity:

2 500

Current page: 1 of 9
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FQD3N50C / FQU3N50C Rev. B

FQD3N50C / FQU3N50C

500V N-Channel MOSFET

Features

• 2.5A, 500V, R

• Low gate charge ( typical 10 nC)

• Low Crss ( typical 8.5pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• RoHS compliant

Absolute Maximum Ratings

Thermal Characteristics

* When mounted on the minimum pad size recommended (PCB Mount)

dv/dt

DSS

GSS

θJC

θJA

, T

Symbol

STG

DS(on)

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient*

Thermal Resistance, Junction-to-Ambient

Drain-Source Voltage

Drain Current

Gate-Source Voltage

Single Pulsed Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Power Dissipation (T

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes,

1/8" from case for 5 seconds

= 2.5Ω @V

D-PAK

FQD Series

= 10 V

- Derate above 25°C

- Continuous (T

- Pulsed

= 25°C)

Parameter

= 25°C)

= 100°C)

I-PAK

FQU Series

Description

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary, planar

stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the avalanche

and commutation mode. These devices are well suited for high

efficient switched mode power supplies, active power factor

correction, electronic lamp ballast based on half bridge

topology.

(Note 1)

(Note 2)

(Note 1)

(Note 3)

Typ

FQD3N50C/FQU3N50C

-55 to +150

± 30

0.28

500

200

300

2.5

1.5

2.5

3.5

4.5

Max

110

3.5

QFET

March 2008

www.fairchildsemi.com

Units

°C/W

W/°C

V/ns

°C

Related parts for FQD3N50CTM

FQD3N50CTM Summary of contents

Page 1

... Thermal Resistance, Junction-to-Ambient* θJA R Thermal Resistance, Junction-to-Ambient θJA * When mounted on the minimum pad size recommended (PCB Mount) ©2008 Fairchild Semiconductor Corporation FQD3N50C / FQU3N50C Rev. B Description = 10 V These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology ...

Page 2

... Package Marking and Ordering Information Device Marking Device FQD3N50C FQD3N50CTM FQD3N50C FQD3N50CTF FQU3N50C FQU3N50CTU Electrical Characteristics Symbol Parameter Off Characteristics BV Drain-Source Breakdown Voltage DSS ∆BV / DSS Breakdown Voltage Temperature Coefficient ∆ Zero Gate Voltage Drain Current DSS I Gate-Body Leakage Current, Forward ...

Page 3

Typical Performance Characteristics Figure 1. On-Region Characteristics V GS Top : 15 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5 ...

Page 4

Typical Performance Characteristics Figure 7. Breakdown Voltage Variation vs. Temperature 1.2 1.1 1.0 0.9 0.8 -100 - Junction Temperature [ J Figure 9. Maximum Safe Operating Area 2 10 Operation in This Area is Limited by ...

Page 5

Unclamped Inductive Switching Test Circuit & Waveforms FQD3N50C / FQU3N50C Rev. B Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms 5 www.fairchildsemi.com ...

Page 6

FQD3N50C / FQU3N50C Rev. B Peak Diode Recovery dv/dt Test Circuit & Waveforms 6 www.fairchildsemi.com ...

Page 7

Mechanical Dimensions FQD3N50C / FQU3N50C Rev. B D-PAK 7 Dimensions in Millimeters www.fairchildsemi.com ...

Page 8

Mechanical Dimensions FQD3N50C / FQU3N50C Rev. B (Continued) I-PAK 8 Dimensions in Millimeters www.fairchildsemi.com ...

Page 9

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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