FDV302P Fairchild Semiconductor, FDV302P Datasheet

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FDV302P

Manufacturer Part Number
FDV302P
Description
MOSFET P-CH 25V 120MA SOT-23
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FDV302P

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
10 Ohm @ 200mA, 4.5V
Drain To Source Voltage (vdss)
25V
Current - Continuous Drain (id) @ 25° C
120mA
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
0.31nC @ 4.5V
Input Capacitance (ciss) @ Vds
11pF @ 10V
Power - Max
350mW
Mounting Type
Surface Mount
Package / Case
SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
Configuration
Single
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
10 Ohm @ 4.5 V
Forward Transconductance Gfs (max / Min)
0.135 S
Drain-source Breakdown Voltage
25 V
Gate-source Breakdown Voltage
8 V
Continuous Drain Current
0.12 A
Power Dissipation
350 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDV302PTR

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Symbol
V
V
I
P
T
ESD
THERMAL CHARACTERISTICS
R
© 1997 Fairchild Semiconductor Corporation
D
This P-Channel logic level enhancement mode field effect
transistor is produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for digital transistors. Since
bias resistors are not required, this one P-channel FET can
replace several digital transistors with different bias resistors
such as the DTCx and DCDx series.
Absolute Maximum Ratings
General Description
DSS
GSS
D
J
,T
FDV302P
Digital FET, P-Channel
JA
Mark:302
STG
SOT-23
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Maximum Power Dissipation
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
Thermal Resistance, Junction-to-Ambient
SuperSOT
TM
-6
- Continuous
- Pulsed
T
A
= 25
o
C unless otherwise noted
SuperSOT
TM
-8
Features
SO-8
-25 V, -0.12 A continuous, -0.5 A Peak.
Very low level gate drive requirements allowing direct
operation in 3V circuits. V
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Compact industry standard SOT-23 surface mount
package.
Replace many PNP digital transistors (DTCx and DCDx)
with one DMOS FET.
R
R
DS(ON)
DS(ON)
G
-55 to 150
FDV302P
-0.12
0.35
= 13
= 10
-0.5
357
6.0
-25
-8
SOT-223
D
@ V
@ V
GS(th)
GS
GS
< 1.5V.
= -2.7 V
= -4.5 V.
S
October 1997
SOIC-16
FDV302P REV. F
Units
°C/W
°C
kV
W
V
V
A

Related parts for FDV302P

FDV302P Summary of contents

Page 1

... Replace many PNP digital transistors (DTCx and DCDx) with one DMOS FET. TM SuperSOT -8 SO unless otherwise noted A October 1997 -2.7 V DS(ON -4.5 V. DS(ON) GS < 1.5V. GS(th) SOIC-16 SOT-223 FDV302P -25 -8 -0.12 -0.5 0.35 -55 to 150 6.0 357 FDV302P REV. F Units °C kV °C/W ...

Page 2

... Referenced -250 µ -2 - 1.0 MHz -0 -4 GEN - Min Typ Max - - 55°C J -100 o 1.9 C -0.65 -1 -1.5 10 =125° -0.05 0.135 0.22 0.31 0.11 0.04 -0.2 -1 -1.5 (Note) FDV302P REV. F Units µA µ ...

Page 3

... Figure 2. On-Resistance Variation with Drain Current and Gate Voltage -0.05A D 125 ° ,GATE TO SOURCE VOLTAGE (V) GS Gate-To- Source Voltage 125°C J 25°C -55°C 0.4 0.6 0 BODY DIODE FORWARD VOLTAGE (V) SD Variation with Source Current and Temperature. FDV302P REV. F -3.5 -4.5 0 1.2 ...

Page 4

... Figure 8. Capacitance Characteristics 0.001 Figure 10. Single Pulse Maximum Power 0.01 0 TIME (sec iss C oss C rss 0 DRAIN TO SOURCE VOLTAGE (V) DS SINGLE PULSE R =357° C 25°C A 0.01 0 100 SINGLE PULSE TIME (SEC) Dissipation. R ( 357 °C/W JA P(pk ( Duty Cycle FDV302P REV 300 ...

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