PCA9620H/Q900/1,51 NXP Semiconductors, PCA9620H/Q900/1,51 Datasheet - Page 52

• Manufacturer Part Number: PCA9620H/Q900/1,51
• Description: LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER
• Manufacturer: NXP Semiconductors

Specifications of PCA9620H/Q900/1,51

• Number Of Segments: 60
• Maximum Clock Frequency: 14500 Hz
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-80
• Maximum Supply Current: 200 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935291899518

NXP Semiconductors
PCA9620
Product data sheet
The I
condition (S) from the I
addresses available. All PCA9620’s with the corresponding A1 and A0 level acknowledge
in parallel to the slave address, but all PCA9620 with the alternative A1 and A0 levels
ignore the whole I
After acknowledgement, a control byte follows which defines if the next byte is RAM or
command information. The control byte also defines if the next byte is a control byte or
further RAM or command data.
Table 33.
In this way it is possible to configure the device and then fill the display RAM with little
overhead.
The display bytes are stored in the display RAM at the address specified by the data
pointer.
The acknowledgement after each byte is made only by the (A0 and A1) addressed
PCA9620. After the last display byte, the I
Alternatively a START may be issued to RESTART an I
In case that a temperature readout (byte TD[7:0]) is made the R/W bit must be logic 1 and
then the next data byte following is provided by the PCA9620 as shown in
Bit
7
6
5 to 0
Fig 48. Control byte format
Fig 49. I
2
C-bus protocol is shown in
2
Symbol
CO
RS
-
Control byte description
C-bus protocol read mode
All information provided in this document is subject to legal disclaimers.
2
C-bus transfer.
Value
0
1
0
1
-
Rev. 1 — 9 December 2010
2
C-bus master which is followed by one of the four PCA9620 slave
S 0 1 1 1 0
slave address
MSB
CO
7
Figure
Description
continue bit
register selection
not relevant
RS
6
last control byte
control bytes continue
command register
data register
A
1
acknowledge
from PCA9620
R/W = 1
A
0
5
1
47. The sequence is initiated with a START
A
2
Universal LCD driver for low multiplex rates
4
C-bus master issues a STOP condition (P).
M
S
B
not relevant
temperature
readout byte
3
2
1
acknowledge
from master
2
mgl753
L
S
B
013aaa294
C-bus access.
A P
0
LSB
PCA9620
© NXP B.V. 2010. All rights reserved.
Figure
49.
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