PCA9620H/Q900/1,51 NXP Semiconductors, PCA9620H/Q900/1,51 Datasheet - Page 43

LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER

PCA9620H/Q900/1,51

Manufacturer Part Number
PCA9620H/Q900/1,51
Description
LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9620H/Q900/1,51

Number Of Segments
60
Maximum Clock Frequency
14500 Hz
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-80
Maximum Supply Current
200 uA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935291899518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9620H/Q900/1,51
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
PCA9620
Product data sheet
7.9.1.2 RAM filling in 1:2 multiplex drive mode
7.9.1.3 RAM filling in 1:4 multiplex drive mode
In the 1:2 multiplex drive mode the eight transmitted data bits are placed in four
successive display RAM columns of two rows (see
In order to fill the whole two RAM rows 15 bytes need to be sent to the PCA9620. After the
last byte sent the data pointer is wrapped around to column 0 to start a possible RAM
content update (see
the data pointer, then all the bits in the byte will be written correctly.
In the 1:4 multiplex drive mode the eight transmitted data bits are placed in two
successive display RAM columns of four rows (see
Fig 32. Discarded bits and data pointer wrap around at the end of data transmission
Fig 33. Display RAM filling order in 1:2 multiplex drive mode
Fig 34. Data pointer wrap around in 1:2 multiplex drive mode
display RAM rows/
data pointer
backplane outputs
display RAM
(BP)
rows
0 a7 a6 a5 a4 a3 a2 a1 a0
0
All information provided in this document is subject to legal disclaimers.
0
1
display RAM
1
data pointer
b7
b6
0
Figure
2
b5
b4
1
Rev. 1 — 9 December 2010
3
b3
b2
2
display RAM columns/segment outputs (S)
4
b0
b1
0
3
1
34). Even if a data byte is transmitted during the wrapping of
5
b0
b1
0
4
6
1
5
7
2
6
columns
3
7
4
wrap around
Universal LCD driver for low multiplex rates
5
48 49 50 51 52
f7 f6 f5 f4 f3 f2 f1 f0 g7 g6 g5 g4 g3 g2 g1 g0
6
wrap around
55 56 57 58 59
7
Figure
Figure
53 54 55 56 57 58 59
55 56 57 58 59
33).
35).
b7
b6
MSB
013aaa288
b7
b5
b4
transmitted data byte
b6
b3
b2
PCA9620
© NXP B.V. 2010. All rights reserved.
b5
b4
b3
discarded
013aaa287
b2
013aaa264
b1
43 of 71
LSB
b0

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