DS33R11 Maxim Integrated Products, DS33R11 Datasheet - Page 140

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DS33R11

Manufacturer Part Number
DS33R11
Description
Network Controller & Processor ICs Ethernet Mapper with Integrated T1-E1-J1
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33R11

Product
Framer
Number Of Transceivers
1
Supply Voltage (max)
1.89 V, 3.465 V
Supply Voltage (min)
1.71 V, 3.135 V
Supply Current (max)
100 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA

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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: MAC Read Pointer Reset (C1MRPR) Setting this bit to 1 resets the receive queue read pointer for
connection 1. This queue pointer must be reset after a disconnect and before a connection. The user must clear
the bit before subsequent reset operations.
Bit 2: HDLC Write Pointer Reset (C1HWPR) Setting this bit to 1 resets the receive queue write pointer for
connection 1. This queue pointer must be reset after a disconnect and before a connection. The user must clear
the bit before subsequent reset operations.
Bit 1: HDLC Read Pointer Reset (C1MHPR) Setting this bit to 1 resets the transmit queue read pointer for
connection 1. This queue pointer must be reset after a disconnect and before a connection. The user must clear
the bit before subsequent reset operations.
Bit 0: MAC Transmit Write Pointer Reset (C1HRPR) Setting this bit to 1 resets the transmit queue write pointer
for connection 1. This queue pointer must be reset after a disconnect and before a connection. The user must clear
the bit before subsequent reset operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: BIST Enable (BISTE) If this bit is set the DS33R11 performs BIST test on the SDRAM. Normal data
communication is halted while BIST enable is high. The user must reset the DS33R11 after completion of BIST test
before normal dataflow can begin.
7
0
-
7
0
-
6
0
-
6
0
-
GL.C1QPR
Connection 1 Queue Pointer Reset
12h
GL.BISTEN
BIST Enable
20h
5
0
-
5
0
-
4
0
-
140 of 344
0
4
-
C1MRPR
3
0
3
0
-
C1HWPR
2
0
2
0
-
C1MHPR
1
0
1
0
-
C1HRPR
BISTE
0
0
0
0

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