LAN91C110-PU SMSC, LAN91C110-PU Datasheet - Page 5

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LAN91C110-PU

Manufacturer Part Number
LAN91C110-PU
Description
Ethernet ICs Non-PCI 10/100 Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN91C110-PU

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
40 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN91C110-PU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN91C110-PU
Manufacturer:
MICROCH
Quantity:
20 000
Chapter 1
SMSC LAN91C110 Rev. B
The LAN91C110 is designed to facilitate the implementation of second generation Fast Ethernet PC Card
adapters and other non-PCI connectivity products. The LAN91C110 is a digital device that implements the
Media Access Control (MAC) portion of the CSMA/CD protocol at 10 and 100 Mbps, and couples it with a lean
and fast data and control path system architecture to ensure that the CPU to packet RAM data movement
does not cause a bottleneck at 100 Mbps.
The LAN91C110 implements a generic 16-bit host interface which is adaptable to a wide range of system
buses and CPUs. This makes the LAN91C110 ideal for 10/100 Fast Ethernet implementations in systems
based on system buses other than PCI.
Total memory size is 128 Kbytes, equivalent to a total chip storage (transmit plus receive) of 64 outstanding
packets. The LAN91C110 is software compatible with the LAN9000 family of products in the default mode and
can use existing LAN9000 drivers (ODI, IPX, and NDIS) with minor modifications in 16 and 32 bit Intel X86
based environments.
Memory management is handled using a unique patented MMU (Memory Management Unit) architecture
and an internal 32-bit wide data path. This I/O mapped architecture can sustain back-to-back frame
transmission and reception for superior data throughput and optimal performance. It also dynamically
allocates buffer memory in an efficient buffer utilization scheme, reducing software tasks and relieving the
host CPU from performing these housekeeping functions. The total memory size is 128 Kbytes (external),
equivalent to a total chip storage (transmit and receive) of 64 outstanding packets.
FEAST provides a flexible slave interface for easy connectivity with industry-standard buses. The host
interface is “ISA-like” and is easily adapted to a wide range of system and CPU buses such as ISA,
PCMCIA, etc.
An IEEE-802.3 compliant Media Independent Interface (MII) provided on the network side of the LAN91C110.
The MII interface allows the use of a wide range of MII compliant Physical Layer (PHY) devices to be used with
the LAN91C110. The LAN91C110 also provides an interface to the two-line MII serial management protocol.
General Description
DATASHEET
Page 5
FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
Revision 1.0 (11-04-08)
Datasheet

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