LAN91C110-PU SMSC, LAN91C110-PU Datasheet - Page 23

• Manufacturer Part Number: LAN91C110-PU
• Description: Ethernet ICs Non-PCI 10/100 Ethernet MAC
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN91C110-PU

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 40 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BANK 0
MEMORY RESERVED FOR TRANSMIT - Programming this value allows the host CPU to reserve memory to be used
later for transmit, limiting the amount of memory that receive packets can use. When programmed for zero, the memory
allocation between transmit and receive is completely dynamic. When programmed for a non-zero value, the allocation is
dynamic if the free memory exceeds the programmed value, while receive allocation requests are denied if the free
memory is less or equal to the programmed value. This register defaults to zero upon reset. It is not affected by the
RESET MMU command.
The value written to the MCR is a reserved memory space IN ADDITION TO ANY MEMORY CURRENTLY IN USE. If the
memory allocated for transmit plus the reserved space for transmit is required to be constant (rather than grow with
transmit allocations) the CPU should update the value of this register after allocating or releasing memory.
The contents of the MIR as well as the low byte of the MCR are specified in units of 256 * M bytes, where M is the
Memory Size Multiplier. M=2 for the LAN91C110. A value of 04h in the lower byte of the MCR is equal to one 2K page (4
* 256 *2 = 2K); since memory must be reserved in multiples of pages, bits 0 and 1 of the MCR should be written to 1 only
when the entire memory is being reserved for transmit (i.e., low byte of MCR = FFh).
BANK1
The Configuration Register holds bits that define the adapter configuration and are not expected to change during run-
time. This register is part of the EEPROM saved setup.
SMSC LAN91C110 Rev. B
BYTE
BYTE
HIGH
LOW
OFFSET
HIGH
BYTE
BYTE
OFFSET
LOW
A
0
SELECT
MII
1
1
1
0
0
CONFIGURATION REGISTER
Reserved
Reserved
MEMORY CONFIGURATION
0
0
MEMORY RESERVED FOR TRANSMIT (IN BYTES * 256 * M)
0
0
REGISTER
NAME
NAME
1
1
DATASHEET
1
0
NO WAIT
Reserved
Page 23
0
1
1
0
Reserved
MEMORY SIZE MULTIPLIER
READ/WRITE
READ/WRITE
0
0
Lower Byte -
Upper Byte -
READ ONLY
0
0
TYPE
TYPE
INT SEL1
STEP
FULL
1
0
0
0
Reserved
INT SEL0
0
0
SYMBOL
SYMBOL
0
0
MCR
CR
Revision 1.0 (11-04-08)
1
0
SELECT
AUI
0
1