FDS8934A Fairchild Semiconductor, FDS8934A Datasheet - Page 2

MOSFET P-CH DUAL 20V 4A 8SOIC

FDS8934A

Manufacturer Part Number
FDS8934A
Description
MOSFET P-CH DUAL 20V 4A 8SOIC
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FDS8934A

Fet Type
2 P-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
55 mOhm @ 4A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
4A
Vgs(th) (max) @ Id
1V @ 250µA
Gate Charge (qg) @ Vgs
28nC @ 5V
Input Capacitance (ciss) @ Vds
1130pF @ 10V
Power - Max
900mW
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Configuration
Dual Dual Drain
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.055 Ohms
Forward Transconductance Gfs (max / Min)
13 S
Drain-source Breakdown Voltage
- 20 V
Gate-source Breakdown Voltage
- 8 V
Continuous Drain Current
4 A
Power Dissipation
2 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Electrical Characteristics (
Symbol
OFF CHARACTERISTICS
BV
I
I
I
ON CHARACTERISTICS
V
R
I
g
DYNAMIC CHARACTERISTICS
C
C
C
SWITCHING CHARACTERISTICS
t
t
t
t
Q
Q
Q
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
V
Notes:
1. R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
DSS
GSSF
GSSR
D(ON)
D(on)
r
D(off)
f
S
FS
BV
GS(th)
V
SD
DS(ON)
iss
oss
rss
g
gs
gd
Scale 1 : 1 on letter size paper
design while R
DSS
GS(th)
DSS
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
/ T
/ T
J
J
CA
Parameter
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold Voltage Temp. Coefficient
Static Drain-Source On-Resistance
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
is determined by the user's board design.
(Note 2)
a. 78
T
A
pad of 2oz copper.
(Note 2)
O
= 25
C/W on a 0.5 in
O
C unless otherwise noted )
2
Conditions
V
I
V
V
V
V
I
V
V
V
V
V
V
V
V
V
V
D
D
f = 1.0 MHz
GS
DS
GS
GS
DS
GS
GS
GS
DS
DS
DS
GS
DS
GS
GS
= -250 µA, Referenced to 25
= -250 µA, Referenced to 25
= -10 V, I
= 0 V, I
= -16 V, V
= 8 V, V
= -8 V, V
= V
= -4.5 V, I
= -2.5 V, I
= -10 V, V
= -10 V, I
= -10 V, V
= -4.5 V , R
= -5 V, I
= -5 V
= 0 V, I
GS
, I
D
DS
D
S
DS
D
= -250 µA
= -250 µA
D
D
b. 125
GS
= 0 V
GS
= -4 A,
= 0 V
DS
-1.3 A
D
D
= -1 A
= -4 A
GEN
pad of 2oz copper.
= -4 A
= -3.4 A
= 0 V
= -5 V
= 0 V,
O
C/W on a 0.02 in
= 6
(Note 2)
T
J
=125°C
o
o
2
C
C
Min
-0.4
-20
-20
0.043
0.062
0.059
1130
Typ
-0.6
480
120
260
-0.7
-23
2.8
3.2
13
23
90
20
4
8
c. 135
pad of 2oz copper.
O
0.055
0.077
0.072
C/W on a 0.003 in
Max
-100
-100
360
125
-1.3
-1.2
16
37
28
-1
-1
JC
is guaranteed by
FDS8934A Rev.B
mV/
mV/
Units
µA
nA
nA
nC
ns
V
V
A
S
pF
pF
pF
A
V
o
o
C
C
2

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