J108_D74Z Fairchild Semiconductor, J108_D74Z Datasheet
J108_D74Z
Specifications of J108_D74Z
Related parts for J108_D74Z
J108_D74Z Summary of contents
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... Drain Gate & Source Gate (off) Capacitance sg C (on) Drain-Gate Off Capacitance dg C (off) Source-Gate Off Capacitance sg * Pulse Test: Pulse Width 300 s, Duty Cycle ©2002 Fairchild Semiconductor Corporation 1 1. Drain 2. Source 3. Gate T =25 C unless otherwise noted A Parameter T =25 C unless otherwise noted A Test Condition ...
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... P Total Device Dissipation D Derate above Thermal Resistance, Junction to Case JC R Thermal Resistance, Junction to Ambient JA * Device mounted on FR-4 PCB 1.6” 1.6” 0.06" ©2002 Fairchild Semiconductor Corporation T =25 C unless otherwise noted A Parameter Max. Units J108 - 110 *MMBFJ108 625 350 mW 5.0 2.8 ...
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... Normalized Drain Resistance vs Bias Voltage 100 V @ 5.0V GS(off ________ GS(off 0.2 0 NORMALIZED GATE-SOURCE VOLTAGE (V) GS GS(off) Figure 5. Normalized Drain Resistance vs Bias Voltage ©2002 Fairchild Semiconductor Corporation 100 I DSS - 2 GS(off 캜 캜 캜 캜 TYP 5.0 V GS(off) _ 1.2 1 TYP 5.0V ...
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... 캜 캜 캜 캜 10V 125 캜 캜 캜 캜 1.0 kHz 0 DRAIN CURRENT (mA) D Figure 11. Transconductance vs Drain Current ©2002 Fairchild Semiconductor Corporation (Continued 캜 캜 캜 캜 GS(off -10 0 Figure 8. Switching Turn-On Time vs Drain Current 100 125 캜 캜 캜 캜 ...
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... Package Dimensions 0.46 0.10 1.27TYP [1.27 ] 0.20 ©2002 Fairchild Semiconductor Corporation TO-92 +0.25 4.58 –0.15 1.27TYP [1.27 ] 0.20 3.60 0.20 (R2.29) +0.10 0.38 –0.05 Dimensions in Millimeters Rev. B1, November 2002 ...
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... Package Dimensions ©2002 Fairchild Semiconductor Corporation (Continued) SuperSOT-3 Dimensions in Millimeters Rev. B1, November 2002 ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FACT™ ActiveArray™ FACT Quiet series™ ® Bottomless™ FAST CoolFET™ FASTr™ CROSSVOLT™ ...