HGTG12N60A4D Fairchild Semiconductor, HGTG12N60A4D Datasheet - Page 8

• Manufacturer Part Number: HGTG12N60A4D
• Description: IGBT N-CH SMPS 600V 54A TO247
• Manufacturer: Fairchild Semiconductor

Specifications of HGTG12N60A4D

• Voltage - Collector Emitter Breakdown (max): 600V
• Vce(on) (max) @ Vge, Ic: 2.7V @ 15V, 12A
• Current - Collector (ic) (max): 54A
• Power - Max: 167W
• Input Type: Standard
• Mounting Type: Through Hole
• Package / Case: TO-247-3
• Transistor Type: IGBT
• Dc Collector Current: 54A
• Collector Emitter Voltage Vces: 600V
• Power Dissipation Pd: 167W
• Collector Emitter Voltage V(br)ceo: 600V
• Operating Temperature Range: -55°C To +150°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Igbt Type: -
• Other names: HGTG12N60A4D_NL; HGTG12N60A4D_NL

Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
©2001 Fairchild Semiconductor Corporation
1. Prior to assembly into a circuit, all leads should be kept
2. When devices are removed by hand from their carriers,
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
5. Gate Voltage Rating - Never exceed the gate-voltage
6. Gate Termination - The gates of these devices are
7. Gate Protection - These devices do not have an internal
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
circuits with power on.
rating of V
permanent damage to the oxide layer in the gate region.
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
GEM
. Exceeding the rated V
GE
can result in
Operating Frequency Information
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. t
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T
is important when controlling output ripple under a lightly
loaded condition.
f
allowable dissipation (P
The sum of device switching and conduction losses must
not exceed P
the conduction losses (P
P
E
shown in Figure 25. E
instantaneous power loss (I
E
(I
calculation for E
(I
MAX2
MAX1
CE
CE
C
ON2
OFF
= (V
= 0).
x V
is the integral of the instantaneous power loss
and E
is defined by f
is defined by f
CE
CE
) during turn-off. All tail losses are included in the
x I
OFF
D
d(OFF)I
CE
MAX1
. A 50% duty factor was used (Figure 3) and
OFF
)/2.
are defined in the switching waveforms
HGTG12N60A4D, HGTP12N60A4D, HGT1S12N60A4DS Rev. B
MAX2
; i.e., the collector current equals zero
MAX1
or f
and t
ON2
D
) is defined by P
MAX2
C
= (P
) are approximated by
is the integral of the
d(ON)I
= 0.05/(t
CE
D
; whichever is smaller at each
x V
CE
- P
are defined in Figure 25.
CE
) plots are possible using
C
d(OFF)I
)/(E
) during turn-on and
D
OFF
= (T
+ t
+ E
d(ON)I
JM
JM
ON2
- T
. t
).
C
). The
d(OFF)I
)/R
JC
.