HGTG5N120BND Fairchild Semiconductor, HGTG5N120BND Datasheet - Page 7

• Manufacturer Part Number: HGTG5N120BND
• Description: IGBT NPT N-CH 1200V 21A TO-247
• Manufacturer: Fairchild Semiconductor

Specifications of HGTG5N120BND

• Igbt Type: NPT
• Voltage - Collector Emitter Breakdown (max): 1200V
• Vce(on) (max) @ Vge, Ic: 2.7V @ 15V, 5A
• Current - Collector (ic) (max): 21A
• Power - Max: 167W
• Input Type: Standard
• Mounting Type: Through Hole
• Package / Case: TO-247-3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Test Circuit and Waveforms
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gate-
insulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in the
handler’s body capacitance is not discharged through the
device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in military,
industrial and consumer applications, with virtually no damage
problems due to electrostatic discharge. IGBTs can be
handled safely if the following basic precautions are taken:
©2003 Fairchild Semiconductor Corporation
1. Prior to assembly into a circuit, all leads should be kept
2. When devices are removed by hand from their carriers, the
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
5. Gate Voltage Rating - Never exceed the gate-voltage
6. Gate Termination - The gates of these devices are
7. Gate Protection - These devices do not have an internal
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such as
“ECCOSORBD™ LD26” or equivalent.
hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
circuits with power on.
rating of V
permanent damage to the oxide layer in the gate region.
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup on
the input capacitor due to leakage currents or pickup.
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
R
G
GEM
= 25
. Exceeding the rated V
L = 2mH
HGTG5N120BND
GE
+
-
can result in
V
DD
= 960V
Operating Frequency Information
Operating frequency information for a typical device (Figure 3)
is presented as a guide for estimating device performance for
a specific application. Other typical frequency vs collector
current (I
for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating
frequency plot (Figure 3) of a typical device shows f
f
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
f
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions are
possible. t
turn-off delay can establish an additional frequency limiting
condition for an application other than T
important when controlling output ripple under a lightly loaded
condition.
f
allowable dissipation (P
The sum of device switching and conduction losses must
not exceed P
the conduction losses (P
P
E
in Figure 21. E
loss (I
instantaneous power loss (I
losses are included in the calculation for E
collector current equals zero (I
MAX2
MAX1
MAX2
V
V
I
ON
CE
C
GE
CE
= (V
and E
CE
; whichever is smaller at each point. The information is
is defined by f
is defined by f
CE
FIGURE 21. SWITCHING TEST WAVEFORMS
CE
x V
d(OFF)I
OFF
x I
) plots are possible using the information shown
CE
D
CE
ON
t
. A 50% duty factor was used (Figure 3) and
) during turn-on and E
d(OFF)I
are defined in the switching waveforms shown
90%
)/2.
and t
is the integral of the instantaneous power
10%
MAX2
MAX1
d(ON)I
D
t
fI
) is defined by P
C
= (P
= 0.05/(t
) are approximated by
CE
E
are defined in Figure 19. Device
HGTG5N120BND, HGTP5N120BND, Rev. B1
CE
OFF
D
x V
90%
- P
= 0).
CE
d(OFF)I
C
)/(E
) during turn-off. All tail
E
OFF
ON
JM
D
OFF
10%
is the integral of the
OFF
= (T
+ t
. t
t
d(ON)I
d(OFF)I
d(ON)I
+ E
t
JM
; i.e., the
rI
ON
- T
).
MAX1
). The
is
C
)/R
or
JC
.