ADNS-2610 Avago Technologies US Inc., ADNS-2610 Datasheet - Page 17

SENSOR OPTICAL MOUSE 8-DIP

ADNS-2610

Manufacturer Part Number
ADNS-2610
Description
SENSOR OPTICAL MOUSE 8-DIP
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ADNS-2610

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
516-1843
ADNS-2610
Serial Port Timer Timeout
Figure 29. Power-up serial port timer sequence.
If the microprocessor waits at least t
ensure that the ADNS-2610 has powered up and the timer
has timed out. This assumes that the microprocessor and
the ADNS-2610 share the same power supply. If not, then
the microprocessor must wait for t
V
ADNS-2610 will be in sync with the microprocessor.
Resync Note
If the microprocessor and the ADNS-2610 get out of sync,
then the data either written or read from the registers will
be incorrect. An easy way to solve this is to use watchdog
timer timeout sequence to resync the parts after an incor-
rect read.
Power-up
ADNS-2610 has an on-chip internal power-up reset (POR)
circuit, which will reset the chip when VDD reaches the
valid value for the chip to function.
CLK
SDIO
Figure 0. ADNS-2610 soft reset sequence timing.
Soft reset will occur when writing 0x80 to the
configuration register.
SDIO
Figure 1. Soft reset configuration register writing operation.
17
SCK
SCK
SDIO
V
SCK
DD
DD
valid. Then when the SCK toggles for the address, the
Operation
Write
1
0
>t
0
SPTT
Configuration Register Address
1
0
A
6
0
SPTT
Address = 0x01
SPTT
A
from V
5
0
from ADNS-2610
A
4
0
DD
valid, it will
A
3
0
1
D
5
0
Soft Reset
ADNS-2610 may also be given the reset command at any
time via the serial I/O port. The timing and transactions are
the same as those just specified for the power-up mode
in the previous section.
The proper way to perform soft reset on ADNS-2610 is:
1. The microcontroller starts the transaction by sending a
2. The digital section is now ready to go. It takes 3 frames for
D
Configuration Register Data
4
write operation containing the address of the configuration
register and the data value of 0x80. Since the reset bit is
set, ADNS-2610 will reset and any other bits written into
the configuration register at this time is properly written
into the Configuration Register. After the chip has been
reset, very quickly, the ADNS-2610 will clear the reset bit
so there is no need for the microcontroller to re-write the
Configuration Register to reset it.
the analog section to settle.
0
D
3
0
D
Data = 0x0b000XXXXX
2
D
Don't Care State
1
0
D
0
0
Reset Occurs
here
0
0

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