CYII4SM014KAA-GEC Cypress Semiconductor Corp, CYII4SM014KAA-GEC Datasheet - Page 2

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CYII4SM014KAA-GEC

Manufacturer Part Number
CYII4SM014KAA-GEC
Description
SENSOR IMAGE MONO CMOS 49-PGA
Manufacturer
Cypress Semiconductor Corp
Type
CMOS Imagingr

Specifications of CYII4SM014KAA-GEC

Package / Case
49-PGA
Pixel Size
8µm x 8µm
Active Pixel Array
3048H x 4560V
Frames Per Second
3
Voltage - Supply
3.3V
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
0 C
Image Size
4560 H x 3048 V
Color Sensing
Monochrome
Package
49PGA
Operating Temperature
0 to 50 °C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
IBIS4-14000-M
IBIS4-14000-M
Document #: 38-05709 Rev. *C
Architecture and Operation
Floor Plan
The basic architecture of the sensor is shown in
The Y shift registers point at a row of the imager array. This
row is selected and/or reset by the row drivers. There are 2 Y
shift registers: one points at the row that is read out and the
second one points at the row to be reset. The second pointer
may lead the first pointer by a specific number of rows. In that
case, the time difference between both pointers is the
integration time. Alternatively, both shift registers can point at
the same row for reset and readout for a faster reset
sequence. When the row is read out, it is also reset in order to
do double sampling for fixed pattern noise reduction.
SYNC_YL
CLK_YL
SYNC_X
CLK_X
Figure 1. Block Diagram of the IBIS4-14000 Image Sensor
SHS
SHR
Pixel (0,0)
Figure
4560 x 3048 active pixels
3048 column amplifiers
x-shift register
1.
pixel array
The pixel array of the IBIS4-14000 consists of 4536 x 3024
active pixels and 24 additional columns and rows, which can
also be addressed (see
amplifiers read out the pixel information and perform the
double sampling operation. They also multiplex the signals on
the readout buses, which are buffered by the output amplifiers.
The shift registers can be configured for various subsampling
modes. The output amplifiers can be individually powered
down. And some other extra functions are foreseen. These
options are configurable via a serial input port.
CYII4SM014KAA-GEC
CYII4SC014KAA-GTC
Figure 2 on page
CLK_YR
SYNC_YR
4 parallel
analog
outputs
3). The column
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