EVAL-AD1937AZ Analog Devices Inc, EVAL-AD1937AZ Datasheet
EVAL-AD1937AZ
Specifications of EVAL-AD1937AZ
Related parts for EVAL-AD1937AZ
EVAL-AD1937AZ Summary of contents
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... One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD1937/AD1939 Four ADC/Eight DAC with PLL 192 kHz, 24-Bit Codec EVAL-AD1937AZ/EVAL-AD1939AZ PACKAGE CONTENTS AD1937/AD1939 evaluation board USBi control interface board ...
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... UG-040 TABLE OF CONTENTS EVAL-AD1937AZ/EVAL-AD1939AZ Package Contents ........... 1 Other Supporting Documentation ................................................. 1 Evaluation Board Overview ............................................................ 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Setting Up the Evaluation Board .................................................... 3 Standalone Mode .......................................................................... 3 SPI and Control ...................................................................... 3 Automated Register Window Builder Software Installation .. 3 Hardware Setup—USBi ............................................................... 3 REVISION HISTORY 2/10—Revision 0: Initial Version Evaluation Board User Guide Powering the Board ...
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... At www.analog.com/AD1937 or www.analog.com/AD1939, find the Resources & Tools list. ADDR1 2. In the list, find Evaluation Boards & Development Kits and click Evaluation Boards/Tools to open the provided ARWBvXX.zip file. 3. Double-click the provided .msi file to extract the files to an empty folder on your PC. ...
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... The clock feed to the CPLD comes directly from the clock source. Note that, if the HDR connectors are to be driven with MCLK from a source on the evaluation board, SW2 and/or SW3 must be switched from the IN position to the OUT position. C96 ...
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... Evaluation Board User Guide 193X_MCLKI DISABLE JP18 JP20 MCLKO XTAL JP19 1938_MCLKI JP22 R160 L7 C158 Y1 JP23 CPLD R167 U21 JP25 HDR2 R169 JP27 OSC DISABLE R172 HDR1 U22 JP28 EXT CLK R174 JP29 8416 C168 C170 JP30 HDR2 JP31 HDR1 Figure 10. External Clock In as Master; the AD1939 and CPLD as Slaves ...
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... The CM and FILTR lines are very sensitive and do not react well to a change in load while the AD1937/AD1939 is active. A series of jumpers allows the user to dc-couple the buffer circuit to the ADC analog port when CM and FILTR are selected (see Figure 16). Evaluation Board User Guide R73 R72 C60 C61 ...
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... Control 1 register bits for BCLK and LRCLK must be changed to master, and SW2, Position 2 and Position 3, and SW2, Position 5 and Position 6, must all be on. On this evaluation board, these settings allow the master port on the AD1937/AD1939 to drive both the S/PDIF and the HDR connections. Many combinations of master and slave are possible (see Figure 17 and Figure 18 for the correct settings) ...
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... UG-040 ROTARY AND DIP SWITCH SETTINGS Evaluation Board User Guide Figure 17. Settings Chart 1 Rev Page 08411-017 ...
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... Evaluation Board User Guide Figure 18. Settings Chart 2 Rev Page UG-040 08411-018 ...
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... UG-040 SCHEMATICS AND ARTWORK Figure 19. Board Schematics, Page 1—ADC Buffer Circuits Rev Page Evaluation Board User Guide 08411-019 ...
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... Evaluation Board User Guide Figure 20. Board Schematics, Page 2—Serial Digital Audio Interface Headers with MCLK Direction Switching Rev Page UG-040 08411-020 ...
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... UG-040 Figure 21. Board Schematics, Page 3—S/PDIF Receive and Transmit Interfaces Evaluation Board User Guide Rev Page 08411-021 ...
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... Evaluation Board User Guide Figure 22. Board Schematics, Page 4—Serial Digital Audio Routing and Control CPLD Rev Page UG-040 08411-022 ...
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... UG-040 Figure 23. Board Schematics, Page 5—AD1937/AD1939 with MCLK Selection Jumpers Evaluation Board User Guide Rev Page 08411-023 ...
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... Evaluation Board User Guide Figure 24. Board Schematics, Page 6—Daughter Card Interface, Useful as Test Points Rev Page UG-040 ...
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... UG-040 Figure 25. Board Schematics, Page 7—DAC Buffer Circuits Rev Page Evaluation Board User Guide 08411-025 ...
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... Evaluation Board User Guide Figure 26. Board Schematics, Page 8—SPI and I Rev Page Control Interface UG-040 ...
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... UG-040 Figure 27. Board Schematics, Page 9—Power Supply Rev Page Evaluation Board User Guide ...
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... Evaluation Board User Guide Figure 28. Top Assembly Layer Rev Page UG-040 ...
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... UG-040 Evaluation Board User Guide Figure 29. Bottom Assembly Layer Rev Page ...
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... Evaluation Board User Guide CPLD CODE MODULE IF_Logic TITLE 'AD1939 EVB Input Interface Logic' //=================================================================================== // FILE: // REVISION DATE: 04-16-09 (rev-E) // REVISION: // DESCRIPTION: //=================================================================================== LIBRARY 'MACH'; "INPUTS ---------------------------------------------------------------------------- // AD1939 CODEC pins DSDATA1,DSDATA2 pin 86, 87 istype 'com'; DSDATA3,DSDATA4 pin 91, 92 istype 'com'; DBCLK,DLRCLK pin 85, 84 istype 'com'; ...
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... S2-7 pin 4 istype 'com'; pin 5,6,8,9 istype 'com pin 10,11,14,15 istype 'com node istype 'com'; node istype 'reg, buffer'; Rev Page Evaluation Board User Guide pin 50 istype pin 49 istype pin 89 istype pin 81 istype pin 69 istype pin 93 istype ...
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... Evaluation Board User Guide //================================================================================ "MACROS // Switch S3, DIP POSITIONS 6 AND 7 ADC_HDR_NORMAL = ( MODE22 & ADC_HDR_DATA2_DATA1 = ( MODE22 & !MODE23); ADC_HDR_TDM = (!MODE22 & ADC_HDR_AUX = (!MODE22 & !MODE23); S/PDIF_OUT_MUX = MODE24; // Hex Switch position 0, DAC_RX_ALL = ( MODE14 & MODE13 & position 1, DAC_RX_1 = ( MODE14 & MODE13 & position 2, DAC_RX_2 = ( MODE14 & ...
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... SFSEL1 = Serial Format Select 1 SFSEL0_RX = // SFSEL0 = Serial Format Select 0 RMCKF_RX = Receive Master Clock Frequency // M0_8414 = (0 # !DAC_S/PDIF); // M1_8414 = 1; // M2_8414 = 0; Evaluation Board User Guide !MODE12 & !MODE11); MODE12 & MODE11); MODE12 & !MODE11); !MODE12 & MODE11); !MODE12 & !MODE11); DAC_S/PDIF; // SOMS = Serial Output Master/Slave Select ...
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... Evaluation Board User Guide // M3_8414 = 0; // CS8404 Tx interface mode select APMS_TX = serial port is always slave in this application SFMT1_TX = 0; SFMT0_TX = 1; // M0_8404 = 0; // M1_8404 = 0; // M2_8404 = 1; // I2S format only // divide 256Fs clock by 2 for 128Fs clock to the S/PDIF Tx // Qdivide.clk = CPLD_MCLK; // Qdivide.d = !Qdivide; // MCLK_8406 = Qdivide; MCLK_8406 = CPLD_MCLK; ...
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... DAC_S/PDIF) # (HDR1_DLRCLK & DAC_HDR1) # (DLRCLK & DAC_DAC) # (I_ALRCLK & DAC_ADC); I_ABCLK = (BCLK_8416 & ADC_S/PDIF) # (HDR1_ABCLK & ADC_HDR1) # (ABCLK & ADC_ADC) # (I_DBCLK & ADC_DAC); I_ALRCLK = (LRCLK_8416 & ADC_S/PDIF) # (HDR1_ALRCLK & ADC_HDR1) # (ALRCLK & ADC_ADC) # (I_DLRCLK & ADC_DAC); "==================================================================================== END IF_Logic Evaluation Board User Guide Rev Page ...
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... Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 1. Qty Designator 18 C85, C90 to C94, C101 to C103, C107, C108, C110, C115, C116, C121, C127, C132, C134 50 C1, C2, C5 C10, C20, C21, C28, C29, C38, C42, C48 to C51, C58 to C60, C62, C64, C69, C73, ...
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... Multilayer ceramic capacitor, 100 V, NP0 (0603) Chip resistor, 715 Ω, 1%, 100 mW, thick film (0603) IC inverter hex, TTL/LSTTL, 14 SOIC IC buffer, quad three-state, 14 SOIC Chip resistor, 75 Ω, 1%, 100 mW, thick film Rev Page Evaluation Board User Guide Manufacturer Part Number Rohm MCR03EZPFX24R9 Murata ENA GRM1885C2A301JA01D Rohm ...
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... Evaluation Board User Guide Qty Designator 1 R67 16 C22, C27, C32, C35, C41, C47, C54, C57, C165, C173, C182, C186, C187, C192, C199, C202 U15 1 U23 J22, J23 U13 2 D2 SW1 J1, J14 4 J15 to J18 1 J19 2 J20, J26 S4 JP4, JP11 to JP14, JP17, JP18, JP20 ...
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... Mb/sec fiber optic receiving module with shutter 15 Mb/sec fiber optic transmit module, Mini test point, white, 0.1 inch, OD 100 V, medium power, low saturation transistor, SOT223, NPN Rev Page Evaluation Board User Guide Manufacturer Part Number Scientific SC937-02 Conversion Texas Instruments SN74LVC1G125DRLR ...
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... Evaluation Board User Guide NOTES Rev Page UG-040 ...
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... Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “ ...