EP9307-CRZR Cirrus Logic Inc, EP9307-CRZR Datasheet - Page 319

• Manufacturer Part Number: EP9307-CRZR
• Description: IC Universal Platform ARM9 SOC Prcessor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-CRZR

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 272-LFBGA
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5809834A

DS785UM1
Receive status entries are written to the status queue following one of three possible events,
end of header, end of buffer, or end of frame. The status event is always written after the
appropriate data transfer has been made. For example the end of frame status is written after
the last byte of data has been written to the data buffer, not before. The EOF and EOB bits in
the status entry can be used to determine the cause of a status entry.
Receive Status
Current Address(32)
(RxSCA)
Receive Status
queue Base
Address (32)
(RxSBA)
c = current frame
Figure 9-8. Receive Status Queue
Copyright 2007 Cirrus Logic
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Receive Status Queue
Buffer
Index (15)
Buffer
Index (15)
Buffer
Index (15)
Buffer
Index (15)
Buffer
Index (15)
bits 31 - 0
Status (31)
Status (31)
Status (31)
Status (31)
Status (31)
Length (16)
Length (16)
Length (16)
Length (16)
Length (16)
Frame
Frame
Frame
Frame
Frame
1/10/100 Mbps Ethernet LAN Controller
Receive Status
queue Base Length (16)
(RxSBL)
EP93xx User’s Guide
9-17
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