EP9307-CRZR Cirrus Logic Inc, EP9307-CRZR Datasheet - Page 295
![IC Universal Platform ARM9 SOC Prcessor](/photos/12/14/121421/ep9307-crz_sml.jpg)
EP9307-CRZR
Manufacturer Part Number
EP9307-CRZR
Description
IC Universal Platform ARM9 SOC Prcessor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9307-CRZR
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-LFBGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
Q5809834A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
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DS785UM1
ERROR:
INTEOI:
BG:
REMAP:
P2
0
1
1
1
1
P1
1
0
0
1
1
Table 8-23. Pixel Mode Encoding
Copyright 2007 Cirrus Logic
P0
1
0
1
0
1
Error Indicator - Read/Write
1 - Bus error has occurred
0 - No error.
Interrupt / End of Interrupt - Read/Write
Reading this bit returns the status of the Block Fill or Block
Copy function interrupt (active high):
‘1’ - Interrupt request. Indicates Block Fill or Block Copy
function has completed.
‘0’ - No interrupt request. Indicates Block Fill or Block
Copy function has not completed.
Writing ‘0’ to this bit will clear the interrupt request; writing
‘1’ to this bit will generate an interrupt request.
This bit may be used to cancel a ‘broken’ graphics function
that never completes. Masking the interrupt by writing
INTEN = ‘0’, and writing INTEOI = ‘1’ will halt the current
Graphics Accelerator function.
Background - Read/Write
When this bit is ‘0’ during remap (REMAP = ‘0’), source
image pixels that have a value of ‘0’ are unaffected
(transparent) when they are copied to the destination
image.
When this bit is ‘1’ during remap (REMAP = ‘1’), source
image pixels that have a value of ‘0’ are copied to the
destination image with the color value in the BG field of the
BACKGROUND
Reading this bit returns a valid value only when EN = '1'.
Pixel Expansion Mapping Function Enable - Read/Write
The value of REMAP enables or disables the Pixel
Expansion Mapping Function:
32 bits per pixel (24 bpp unpacked)
24 bits per pixel packed
16 bits per pixel
Pixel Mode
register.
not defined
not defined
Graphics Accelerator
EP93xx User’s Guide
8-31
8
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