EP3C16F484I7N Altera, EP3C16F484I7N Datasheet - Page 137

Cyclone III

EP3C16F484I7N

Manufacturer Part Number
EP3C16F484I7N
Description
Cyclone III
Manufacturer
Altera
Datasheet

Specifications of EP3C16F484I7N

Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / Rohs Status
Compliant

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Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Standards Support
Figure 7–9. LVPECL DC-Coupled Termination
Differential SSTL I/O Standard Support in the Cyclone III Device Family
Figure 7–10. Differential SSTL Class I Interface
© December 2009
Output Buffer
f
Altera Corporation
LVPECL Transmitter
Figure 7–9
The differential SSTL I/O standard is a memory-bus standard used for applications
such as high-speed DDR SDRAM interfaces. The Cyclone III device family supports
differential SSTL-2 and SSTL-18 I/O standards. The differential SSTL I/O standard
requires two differential inputs with an external reference voltage (VREF) as well as an
external termination voltage (VTT) of 0.5 × V
connected. The differential SSTL output standard is only supported at PLL#_CLKOUT
pins using two single-ended SSTL output buffers (PLL#_CLKOUTp and
PLL#_CLKOUTn), with the second output programmed to have opposite polarity. The
differential SSTL input standard is supported on the GCLK pins only, treating
differential inputs as two single-ended SSTL and only decoding one of them.
For more information about the differential SSTL electrical specifications, refer to the
Cyclone III Device I/O Features
Cyclone III LS Device Data Sheet
Figure 7–10
shows the LVPECL DC-coupled termination.
shows the differential SSTL Class I interface.
50
50
chapter and the
chapters.
V
100
TT
CCIO
Cyclone III Device Data Sheet
Cyclone III Device Family
to which termination resistors are
LVPECL Receiver
V
TT
Cyclone III Device Handbook, Volume 1
Receiver
and
7–13

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