ADV7183BBSTZ Analog Devices Inc, ADV7183BBSTZ Datasheet - Page 94

• Manufacturer Part Number: ADV7183BBSTZ
• Description: IC,TV/VIDEO CIRCUIT,Color Decoder Circuit,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7183BBSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADV7183B
PCB LAYOUT RECOMMENDATIONS
The ADV7183B is a high precision, high speed, mixed-signal
device. To achieve the maximum performance from the part, it
is important to have a PCB board with a good layout. This
section provides guidelines for designing a board using the
ADV7183B.
ANALOG INTERFACE INPUTS
Care should be taken when routing the inputs on the PCB.
Track lengths should be kept to a minimum, and 75 Ω trace
impedances should be used when possible. Trace impedances
other than 75 Ω also increase the chance of reflections.
POWER SUPPLY DECOUPLING
It is recommended to decouple each power supply pin with
0.1 μF and 10 nF capacitors. The fundamental idea is to have a
decoupling capacitor within about 0.5 cm of each power pin.
Also, avoid placing the capacitor on the opposite side of the PC
board from the ADV7183B, as doing so interposes resistive vias
in the path. The decoupling capacitors should be located
between the power plane and the power pin. Current should
flow from the power plane to the capacitor to the power pin. Do
not make the power connection between the capacitor and the
power pin. Placing a via underneath the 100 nF capacitor pads,
down to the power plane, is generally the best approach (see
F igure 41).
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It is very important to maintain low noise and good stability of
PVDD. Careful attention must be paid to regulation, filtering,
and decoupling. It is highly desirable to provide separate
regulated supplies for each of the analog circuitry groups
(AVDD, DVDD, DVDDIO, and PVDD).
Some graphic controllers use substantially different levels of
power when active (during active picture time) and when idle
(during horizontal and vertical sync periods). This can result in
a measurable change in the voltage supplied to the analog
supply regulator, which can, in turn, produce changes in the
regulated analog supply voltage. This can be mitigated by
regulating the analog supply, or at least PVDD, from a different,
cleaner power source, such as a 12 V supply.
It is also recommended to use a single ground plane for the
entire board. This ground plane should have a space between
the analog and digital sections of the PCB (see
Figure 41. Recommended Power Supply Decoupling
GND
VDD
10nF
100nF
VIA TO SUPPLY
VIA TO GND
F igure 42).
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Rev. B | Page 94 of 100
Experience shows that the noise performance is the same or
better with a single ground plane. Using multiple ground planes
can be detrimental because each separate ground plane is
smaller, and long ground loops can result.
In some cases, using separate ground planes is unavoidable. For
those cases, it is recommended to place a single ground plane
under the ADV7183B. The location of the split should be under
the ADV7183B. For this case, it is even more important to place
components wisely because the current loops will be much
longer (current takes the path of least resistance). An example
of a current loop: power plane to ADV7183B to digital output
trace to digital data receiver to digital ground plane to analog
ground plane.
PLL
Place the PLL loop filter components as close as possible to the
ELPF pin. Do not place any digital or other high frequency
traces near these components. Use the values suggested in
F igure 46 with tolerances of 10% or less.
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DIGITAL OUTPUTS (BOTH DATA AND CLOCKS)
Try to minimize the trace length the digital outputs have to
drive. Longer traces have higher capacitance, which requires
more current, which causes more internal digital noise. Shorter
traces reduce the possibility of reflections.
Adding a 30 Ω to 50 Ω series resistor can suppress reflections,
reduce EMI, and reduce the current spikes inside the ADV7183B.
If series resistors are used, place them as close as possible to the
ADV7183B pins. However, try not to add vias or extra length to
the output trace to make the resistors closer.
If possible, limit the capacitance that each of the digital outputs
drive to less than 15 pF. This can easily be accomplished by
keeping traces short and by connecting the outputs to only one
device. Loading the outputs with excessive capacitance increases
the current transients inside the ADV7183B, creating more
digital noise on its power supplies.
DIGITAL INPUTS
The digital inputs on the ADV7183B are designed to work with
3.3 V signals, and are not tolerant of 5 V signals. Extra compo-
nents are needed if 5 V logic signals are required to be applied
to the decoder.
ANALOG
SECTION
Figure 42. PCB Ground Layout
ADV7183B
SECTION
DIGITAL