ADUC7061BCPZ32-RL Analog Devices Inc, ADUC7061BCPZ32-RL Datasheet - Page 82

• Manufacturer Part Number: ADUC7061BCPZ32-RL
• Description: DUAL 24-BIT AFE AND ARM 7 I.C
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7061BCPZ32-RL

• Design Resources: USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075) 4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 2.625 V
• Data Converters: A/D 5x24b, 8x24b, D/A 1x14b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7060/ADuC7061
UART Control Register 1
This 8-bit register controls the operation of the UART in
conjunction with COMCON0.
COMCON1 Register
Name:
Address:
Default value:
Access:
Table 90. COMCON1 MMR Bit Designations
Bit
7:5
4
3:2
1
0
UART Status Register 0
COMSTA0 Register
Name:
Address:
Default value:
Access:
Function:
Name
LOOPBACK
RTS
DTR
COMCON1
0xFFFF0710
0x00
Read and write
COMSTA0
0xFFFF0714
0x60
Read only
This 8-bit read-only register reflects the
current status on the UART.
Description
Reserved bits. Not used.
Loopback. Set by user to enable
loopback mode. In loopback mode,
the transmit pin is forced high.
Reserved bits. Not used.
Request to send.
Set by user to force the RTS output to 0.
Cleared by user to force the RTS
output to 1.
Data terminal ready.
Set by user to force the DTR output to 0.
Cleared by user to force the DTR
output to 1.
Rev. B | Page 82 of 108
Table 91. COMSTA0 MMR Bit Designations
Bit
7
6
5
4
3
2
1
0
Name
TEMT
THRE
BI
FE
PE
OE
DR
Reserved.
Set automatically if COMTX and the shift
register are empty. This bit indicates that
the data has been transmitted, that is, no
more data is present in the shift register.
Cleared automatically when writing to
COMTX.
COMTX empty status bit.
Set automatically if COMTX is empty.
COMTX can be written as soon as this bit
is set; the previous data might not have
been transmitted yet and can still be
present in the shift register.
Cleared automatically when writing to
COMTX.
Break indicator.
Set when P1.0/IRQ1/SIN/T0 pin is held
low for more than the maximum word
length.
Cleared automatically.
Framing error.
Cleared automatically.
Cleared automatically.
Overrun error.
Set automatically if data is overwritten
before being read.
Cleared automatically.
Data ready.
Description
COMTX and shift register empty status bit.
Set when the stop bit is invalid.
Parity error.
Set when a parity error occurs.
Set automatically when COMRX is full.
Cleared by reading COMRX.