ADCLK854/PCBZ Analog Devices Inc, ADCLK854/PCBZ Datasheet - Page 8

• Manufacturer Part Number: ADCLK854/PCBZ
• Description: Evaluation Kit For 1.8v 6vvds/12 CMOS Cl
• Manufacturer: Analog Devices Inc

Specifications of ADCLK854/PCBZ

• Design Resources: Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152)
• Main Purpose: Timing, Clock Buffer / Driver / Receiver / Translator
• Embedded: No
• Utilized Ic / Part: ADCLK854
• Primary Attributes: 2 Inputs, 12 Outputs
• Secondary Attributes: CMOS, LVDS Outputs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADCLK854
Pin No.
26
27
28
31
32
33
34
35
36
39
40
41
42
45
46
47
48
(49)
Mnemonic
OUT7 (OUT7A)
OUT6 (OUT6B)
OUT6 (OUT6A)
OUT5 (OUT5B)
OUT5 (OUT5A)
OUT4 (OUT4B)
OUT4 (OUT4A)
NC
NC
OUT3 (OUT3B)
OUT3 (OUT3A)
OUT2 (OUT2B)
OUT2 (OUT2A)
OUT1 (OUT1B)
OUT1 (OUT1A)
OUT0 (OUT0B)
OUT0 (OUT0A)
EPAD
Description
True Side of Differential LVDS Output 7, or CMOS Output 7 on Channel A.
Complementary Side of Differential LVDS Output 6, or CMOS Output 6 on Channel B.
True Side of Differential LVDS Output 6, or CMOS Output 6 on Channel A.
Complementary Side of Differential LVDS Output 5, or CMOS Output 5 on Channel B.
True Side of Differential LVDS Output 5, or CMOS Output 5 on Channel A.
Complementary Side of Differential LVDS Output 4, or CMOS Output 4 on Channel B.
True Side of Differential LVDS Output 4, or CMOS Output 4 on Channel A.
No Connect.
No Connect.
Complementary Side of Differential LVDS Output 3, or CMOS Output 3 on Channel B.
True Side of Differential LVDS Output 3, or CMOS Output 3 on Channel A.
Complementary Side of Differential LVDS Output 2, or CMOS Output 2 on Channel B.
True Side of Differential LVDS Output 2, or CMOS Output 2 on Channel A.
Complementary Side of Differential LVDS Output 1, or CMOS Output 1 on Channel B.
True Side of Differential LVDS Output 1, or CMOS Output 1 on Channel A.
Complementary Side of Differential LVDS Output 0, or CMOS Output 0 on Channel B.
True Side of Differential LVDS Output 0, or CMOS Output 0 on Channel A.
Exposed Paddle. The exposed paddle must be connected to GND.
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