ADCLK854/PCBZ Analog Devices Inc, ADCLK854/PCBZ Datasheet - Page 5

• Manufacturer Part Number: ADCLK854/PCBZ
• Description: Evaluation Kit For 1.8v 6vvds/12 CMOS Cl
• Manufacturer: Analog Devices Inc

Specifications of ADCLK854/PCBZ

• Design Resources: Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152)
• Main Purpose: Timing, Clock Buffer / Driver / Receiver / Translator
• Embedded: No
• Utilized Ic / Part: ADCLK854
• Primary Attributes: 2 Inputs, 12 Outputs
• Secondary Attributes: CMOS, LVDS Outputs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CLOCK CHARACTERISTICS
Table 3. Clock Output Phase Noise
Parameter
CLOCK-TO-LVDS ABSOLUTE PHASE NOISE
CLOCK-TO-CMOS ABSOLUTE PHASE NOISE
LOGIC AND POWER CHARACTERISTICS
Table 4. Control Pin Characteristics
Parameter
CONTROL PINS (IN_SEL, CTRL_x, SLEEP)
POWER
1
2
These pins each have a 200 kΩ internal pull-down resistor.
Change in t
1000 MHz
200 MHz
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Capacitance
Supply Voltage Requirement
LVDS Outputs
CMOS Outputs
SLEEP
Power Supply Rejection
LVDS @ 100 MHz
LVDS @ 1200 MHz
CMOS @ 100 MHz
CMOS @ 250 MHz
LVDS
CMOS
PD
per change in V
2
S
.
1
Symbol
V
V
I
I
V
PSR
PSR
IH
IL
IH
IL
S
t
t
PD
PD
Min
V
5
−5
1.71
S
− 0.4
Min
Typ
8
1.8
84
175
115
265
0.9
1.2
2
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Max
0.4
20
+5
1.89
100
215
140
325
3
Typ
−90
−108
−117
−126
−135
−141
−146
−101
−119
−127
−138
−147
−153
−156
Unit
V
V
μA
μA
pF
V
mA
mA
mA
mA
mA
ps/mV
ps/mV
Max
Conditions
V
Full operation
All outputs enabled as LVDS and loaded, R
Full operation
All outputs enabled as CMOS and loaded, C
All outputs enabled as CMOS and loaded, C
SLEEP pin pulled high; does not include power dissipated
in the external resistors
All outputs enabled as LVDS and loaded, R
S
= 1.8 V ± 5%
Unit
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Conditions
Input slew rate > 1 V/ns
@ 10 Hz offset
@ 100 Hz offset
@ 1 kHz offset
@ 10 kHz offset
@ 100 kHz offset
@ 1 MHz offset
@ 10 MHz offset
Input slew rate > 1 V/ns
@ 10 Hz offset
@ 100 Hz offset
@ 1 kHz offset
@ 10 kHz offset
@ 100 kHz offset
@ 1 MHz offset
@ 10 MHz offset
ADCLK854
L
L
L
L
= 100 Ω
= 100 Ω
= 10 pF
= 10 pF