AD9516-5/PCBZ Analog Devices Inc, AD9516-5/PCBZ Datasheet - Page 71

• Manufacturer Part Number: AD9516-5/PCBZ
• Description: Clock IC With 2.5GHz On-chip VCO EB
• Manufacturer: Analog Devices Inc

Specifications of AD9516-5/PCBZ

• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9516-5
• Primary Attributes: 2 Inputs, 14 Outputs
• Secondary Attributes: CMOS, LVDS, LVPECL Output Logic, ADIsimCLK™ Graphical User Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reg.
Addr
(Hex) Bit(s) Name
1E0
1E1
1E1
Reg.
Addr
(Hex) Bit(s)
1A1
1A2
Table 55. VCO Divider and CLK Input
Table 56. System
Reg.
Addr
(Hex) Bit(s) Name
230
230
230
Table 57. Update All Registers
Reg.
Addr
(Hex) Bit(s) Name
232
[2:0]
[4]
[0]
[0]
[2]
[1]
[0]
[0]
[0]
VCO divider
Power-down clock input section Power down the clock input section (including CLK buffer, VCO divider, and CLK tree).
Bypass VCO divider
Update all
registers
Power-down SYNC
Power-down distribution reference
Soft SYNC
Name
Start High Divider 4.1
Divider 4 DCCOFF
Description
This bit must be set to 1 to transfer the contents of the buffer registers into the active registers. This happens
on the next SCLK rising edge. This bit is self-clearing; that is, it does not have to be set back to 0.
[0] = 1 (self-clearing); update all active registers to the contents of the buffer registers.
Description
Divider 4.1 start high/low.
[0] = 0; start low (default).
[0] = 1; start high.
Duty-cycle correction function.
[0] = 0; enable duty-cycle correction (default).
[0] = 1; disable duty-cycle correction.
Description
[2]
0
0
0
0
1
1
1
1
[4] = 0; normal operation (default).
[4] = 1; power-down.
Bypass or use the VCO divider.
[0] = 0; use VCO divider (default).
[0] = 1; bypass VCO divider.
Description
Power down the SYNC function.
[2] = 0; normal operation of the SYNC function (default).
[2] = 1; power-down SYNC circuitry.
Power down the reference for distribution section.
[1] = 0; normal operation of the reference for the distribution section (default).
[1] = 1; power down the reference for the distribution section.
The soft SYNC bit works the same as the SYNC pin, except that the polarity of the bit is
reversed; that is, a high level forces selected channels into a predetermined static
state, and a 1-to-0 transition triggers a SYNC.
[0] = 0; same as SYNC high (default).
[0] = 1; same as SYNC low.
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[1]
0
0
1
1
0
0
1
1
[0]
0
1
0
1
0
1
0
1
Divide
2
3
4 (default)
5
6
Output static
Output static
Output static
AD9516-5