LS-XP10-BASE-PC-N Lattice, LS-XP10-BASE-PC-N Datasheet - Page 42

• Manufacturer Part Number: LS-XP10-BASE-PC-N
• Description: MCU, MPU & DSP Development Tools ispLEVER Base Lattic eXP-10 Std Dev Kit
• Manufacturer: Lattice

Specifications of LS-XP10-BASE-PC-N

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

44-PIN PLCC CONNECTION DIAGRAM (M4A(3,5)-32/32 AND M4A(3,5)-64/32)
Top View
PIN DESIGNATIONS
CLK/I = Clock or Input
GND = Ground
I/O
V
TDI
TCK = Test Clock
TMS = Test Mode Select
TDO = Test Data Out
42
M4A(3,5)-32/32
CC
= Input/Output
= Supply Voltage
= Test Data In
A10
A11
A8
A9
A2
A1
A0
M4A(3,5)-64/32
M4A(3,5)-64/32
A2
A1
A0
B0
B1
B2
B3
CLK0/I0
I/O10
I/O11
GND
TCK
I/O5
I/O6
I/O7
I/O8
I/O9
TDI
7
8
9
10
11
13
14
15
16
17
12
18
6
19 20 21 22
C
5 4
ispMACH 4A Family
7
44-Pin PLCC
3 2
I/O Cell
PAL Block
23 24 25 26
1 44 43 42
27 28
41 40
39
38
37
36
35
34
33
32
31
30
29
M4A(3,5)-64/32
M4A(3,5)-64/32
I/O27
I/O26
I/O25
I/O24
TDO
GND
CLK1/I1
TMS
I/O23
I/O22
I/O21
D3
D2
D1
D0
C0
C1
C2
M4A(3,5)-32/32
B8
B9
B10
B3
B2
B1
B0
17466G-026