C8051F206DK-G Silicon Laboratories Inc, C8051F206DK-G Datasheet - Page 120

• Manufacturer Part Number: C8051F206DK-G
• Description: MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F206DK-G

• Processor To Be Evaluated: C8051F206
• Data Bus Width: 8 bit
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

C8051F2xx
If T1M (CKCON.4) is logic 1, then the above equation becomes:
If T1M (CKCON.4) is logic 0, then the above equation becomes:
The Timer 2 overflow rate, when in Baud Rate Generator Mode and using an internal clock source, is
determined solely by the Timer 2 16-bit reload value (RCAP2H:RCAP2L). The Timer 2 clock source is
fixed at SYSCLK/2. The Timer 2 overflow rate can be calculated as follows:
Timer 2 can be selected as the baud rate generator for RX and/or TX by setting RCLK (T2CON.5) and/or
TCLK (T2CON.4), respectively. When either RCLK or TCLK is set to logic 1, Timer 2 interrupts are auto-
matically disabled and the timer is forced into Baud Rate Generator Mode with SYSCLK/2 as its clock
source. If a different timebase is required, setting the C/T2 bit (T2CON.1) to logic 1 will allow Timer 2 to be
clocked from the external input pin T2. See the Timers section for complete timer configuration details.
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Figure 16.5. UART Modes 1, 2, and 3 Interconnect Diagram
T2_OVERFLOWRATE = (SYSCLK/2) / (65536 – [RCAP2H:RCAP2L]).
RS-232
T1_OVERFLOWRATE = (SYSCLK/12) / (256 – TH1).
T1_OVERFLOWRATE = (SYSCLK) / (256 – TH1).
MCU
TX
RX
RS-232
LEVEL
Rev. 1.6
XLTR
OR
RX
RX
TX
TX
C8051Fxxx
C8051Fxxx