C8051F206DK-G Silicon Laboratories Inc, C8051F206DK-G Datasheet - Page 106

MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY

C8051F206DK-G

Manufacturer Part Number
C8051F206DK-G
Description
MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F206DK-G

Processor To Be Evaluated
C8051F206
Data Bus Width
8 bit
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
C8051F2xx
106
Bits7–0: Port0 Digital/Analog Input Mode
Bits7–0: P1.[7:0]
Bits7–0: PRT1CF.[7:0]: Output Configuration Bits for P1.7–P1.0 (respectively)
P1.7
R/W
Bit7
R/W
Bit7
R/W
Bit7
0: Corresponding Port0 pin Digital Input disabled. (For analog use, i.e., ADC).
1: Corresponding Port0 pin Digital Input is enabled.
(Write - Output appears on I/O pins per PRT0MX, PRT1MX, and PRT2MX registers)
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding PRT1CF.n bit = 0)
(Read - Regardless of PRT0MX, PRT1MX, and PRT2MX Register settings).
0: P1.n pin is logic low.
1: P1.n pin is logic high.
0: Corresponding P1.n Output Mode is Open-Drain.
1: Corresponding P1.n Output Mode is Push-Pull.
SFR Definition 14.6. P0MODE: Port0 Digital/Analog Input Mode
P1.6
SFR Definition 14.8. PRT1CF: Port1 Configuration Register
R/W
Bit6
R/W
Bit6
R/W
Bit6
P1.5
R/W
R/W
Bit5
Bit5
R/W
SFR Definition 14.7. P1: Port1 Register
Bit5
P1.4
R/W
Bit4
R/W
Bit4
R/W
Bit4
P1.3
R/W
Bit3
Rev. 1.6
R/W
Bit3
R/W
Bit3
P1.2
R/W
Bit2
R/W
Bit2
R/W
Bit2
P1.1
R/W
Bit1
R/W
Bit1
R/W
Bit1
(bit addressable)
P1.0
R/W
Bit0
R/W
Bit0
R/W
Bit0
SFR Address:
SFR Address:
Reset Value
SFR Address:
Reset Value
Reset Value
11111111
11111111
00000000
0xF1
0x90
0xA5

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