C8051F206DK-G Silicon Laboratories Inc, C8051F206DK-G Datasheet - Page 107

MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY

C8051F206DK-G

Manufacturer Part Number
C8051F206DK-G
Description
MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F206DK-G

Processor To Be Evaluated
C8051F206
Data Bus Width
8 bit
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bits7–0: Port1 Digital/Analog Output Mode
Bits7–0: P2.[7:0]
Bits7–0: PRT2CF.[7:0]: Output Configuration Bits for P2.7–P2.0 (respectively)
P2.7
R/W
Bit7
R/W
Bit7
R/W
Bit7
0: Corresponding Port1 pin Digital Input disabled. (For analog use, i.e., ADC or 
comparators).
1: Corresponding Port1 pin Digital Input is enabled.
(Write - Output appears on I/O pins per PRT0MX, PRT1MX, and PRT2MX registers)
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding PRT2CF.n bit = 0)
(Read - Regardless of PRT0MX, PRT1MX, and PRT2MX Register settings).
0: P2.n is logic low.
1: P2.n is logic high.
0: Corresponding P2.n Output Mode is Open-Drain.
1: Corresponding P2.n Output Mode is Push-Pull.
SFR Definition 14.9. P1MODE: Port1 Digital/Analog Input Mode
SFR Definition 14.11. PRT2CF: Port2 Configuration Register
P2.6
R/W
Bit6
R/W
Bit6
R/W
Bit6
P2.5
R/W
R/W
Bit5
SFR Definition 14.10. P2: Port2 Register
Bit
R/W
Bit5
P2.4
R/W
Bit4
R/W
Bit4
R/W
Bit4
P2.3
R/W
Bit3
Rev. 1.6
R/W
Bit3
R/W
Bit3
P2.2
R/W
Bit2
R/W
Bit2
R/W
Bit2
P2.1
R/W
Bit1
R/W
R/W
Bit1
Bit1
(bit addressable)
C8051F2xx
P2.0
R/W
Bit0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
Reset Value
Reset Value
Reset Value
00000000
11111111
11111111
0xA6
0xF2
0xA0
107

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