P0071 Terasic Technologies Inc, P0071 Datasheet - Page 26

• Manufacturer Part Number: P0071
• Description: TPAD MULTIMEDIADEVELOPMENT KIT
• Manufacturer: Terasic Technologies Inc
• Series: tPAD, Cyclone®IVr

Specifications of P0071

• Main Purpose: Reference Design, Tablet
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: EP4CE115
• Primary Attributes: 8-Inch TFT LCD, LED Backlight
• Secondary Attributes: 5-Megapixel Digital Image Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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The Video and Image Processing (VIP) Example Design demonstrates dynamic scaling and clipping
of a standard definition video stream in either National Television System Committee (NTSC) or
Phase Alternation Line (PAL) format and picture-in-picture mixing with a background layer. The
video stream is output in high definition resolution (800× 600) on the HSMC LTC daughter card
(part of the tPad).
The example design demonstrates a framework for rapid development of video and image
processing systems using the parameterizable MegaCore® functions that are available in the Video
and Image Processing Suite. Available functions are listed in
the Quartus II license file includes the VIP suite feature.
IP MegaCore
Function
Frame Reader
Control
Synchronizer
Switch
Color Space
Converter
Chroma Resampler Changes the sampling rate of the chroma data for image frames, for example
2D FIR Filter
Alpha Blending
Mixer
Scaler
Deinterlacer
Test Pattern
Generator
Clipper
Color Plane
Sequencer
Frame Buffer
2D Median Filter
Gamma Corrector
Clocked Video
Input/Output
These functions allow you to fully integrate common video functions with video interfaces,
processors, and external memory controllers. The example design uses an Altera Cyclone® IV E
EP4CE115F29 featured tPad board.
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Description
Reads video from external memory and outputs it as a stream.
Synchronizes the changes made to the video stream in real time between two
functions.
Allows video streams to be switched in real time.
Converts image data between a variety of different color spaces such as RGB to
YCrCb.
from 4:2:2 to 4:4:4 or 4:2:2 to 4:2:0.
Implements a 3 x 3, 5 x 5, or 7 x 7 finite impulse response (FIR) filter on an image
data stream to smooth or sharpen images.
Mixes and blends multiple image streams—useful for implementing text overlay
and picture-in-picture mixing.
A sophisticated polyphase scaler that allows custom scaling and real-time
updates of both the image sizes and the scaling coefficients.
Converts interlaced video formats to progressive video format using a motion
adaptive deinterlacing algorithm. Also supports 'bob' and "weave" algorithms
Generates a video stream that contains still color bars for use as a test pattern.
Provides a way to clip video streams and can be configured at compile time or at
run time.
Changes how color plane samples are transmitted across the Avalon-ST
interface. This function can be used to split and join video streams, giving
control over the routing of color plane samples.
Buffers video frames into external RAM. This core supports double or
triple-buffering with a range of options for frame dropping and repeating.
Provides a way to apply 3 x 3, 5 x 5, or 7 x 7 pixel median filters to video images.
Allows video streams to be corrected for the physical properties of display
devices.
These two cores convert the industry-standard clocked video format (BT-656) to
Avalon-ST video and vice versa.
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Table 4-2 VIP IP cores functions
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Table
4-2. This demonstration needs