P0071 Terasic Technologies Inc, P0071 Datasheet - Page 11

• Manufacturer Part Number: P0071
• Description: TPAD MULTIMEDIADEVELOPMENT KIT
• Manufacturer: Terasic Technologies Inc
• Series: tPAD, Cyclone®IVr

Specifications of P0071

• Main Purpose: Reference Design, Tablet
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: EP4CE115
• Primary Attributes: 8-Inch TFT LCD, LED Backlight
• Secondary Attributes: 5-Megapixel Digital Image Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

This section describes the detailed information of the components, connectors, and pin assignments
of the tPad.
3
The tPad board contains a serial configuration device that stores configuration data for the Cyclone
IV E FPGA. This configuration data is automatically loaded from the configuration device into the
FPGA every time while power is applied to the board. Using the Quartus II software, it is possible
to reconfigure the FPGA at any time, and it is also possible to change the non-volatile data that is
stored in the serial configuration device. Both types of programming methods are described below.
1.
2.
 JTAG Chain on tPad Board
To use JTAG interface for configuring FPGA device, the JTAG chain on the tPad must form a close
loop that allows Quartus II programmer to detect the FPGA device.
chain on the tPad board. Shorting pin1 and pin2 on JP3 can disable the JTAG signals on the HSMC
connector that will form a close JTAG loopback on DE2-115 (See
board FPGA device (Cyclone IV E) will be detected by Quartus II programmer. By default, a
jumper is placed on pin1 and pin3 of JP3. To prevent any changes to the bus controller (Max II
EPM240) described in later sections, users should not adjust the jumper on JP3.
3
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JTAG programming: In this method of programming, named after the IEEE standards Joint
Test Action Group, the configuration bit stream is downloaded directly into the Cyclone IV E
FPGA. The FPGA will retain this configuration as long as power is applied to the board; the
configuration information will be lost when the power is turned off.
AS programming: In this method, called Active Serial programming, the configuration bit
stream is downloaded into the Altera EPCS64 serial configuration device. It provides
non-volatile storage of the bit stream, so that the information is retained even when the power
supply to the tPad board is turned off. When the board‟s power is turned on, the configuration
data in the EPCS64 device is automatically loaded into the Cyclone IV E FPGA.
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Using the tPad
Figure 3-1
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Chapter 3
illustrates the JTAG