PN5120A0HN1/C2,151 NXP Semiconductors, PN5120A0HN1/C2,151 Datasheet - Page 90

• Manufacturer Part Number: PN5120A0HN1/C2,151
• Description: IC TRANSMISSION MOD 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN1/C2,151

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
111334
Product data sheet
12.4 Status information about the FIFO-buffer
The host controller may obtain the following data about the FIFO-buffers status:
The PN512 can generate an interrupt signal
The bit HiAlert is set to logic 1 if maximum WaterLevel bytes (as set in register
WaterLevelReg) or less can be stored in the FIFO-buffer. It is generated according to the
following equation:
The bit LoAlert is set to logic 1 if WaterLevel bytes (as set in register WaterLevelReg) or
less are actually stored in the FIFO-buffer. It is generated according to the following
equation:
•
•
•
•
•
•
Number of bytes already stored in the FIFO-buffer: FIFOLevel in register
FIFOLevelReg
Warning, that the FIFO-buffer is almost full: HiAlert in register Status1Reg
Warning, that the FIFO-buffer is almost empty: LoAlert in register Status1Reg
Indication, that bytes were written to the FIFO-buffer although it was already full:
BufferOvfl in register ErrorReg. BufferOvfl can be cleared only by setting bit
FlushBuffer in the register FIFOLevelReg.
If LoAlertIEn in register CommIEnReg is set to logic 1 it will activate pin IRQ when
LoAlert in the register Status1Reg changes to 1.
If HiAlertIEN in register CommIEnReg is set to logic 1 it will activate pin IRQ when
HiAlert in the register Status1Reg changes to 1.
Rev. 3.4 — 8 September 2009
HiAlert
LoAlert
=
(
=
64 FIFOLength
FIFOLength
–
≤
)
WaterLevel
≤
WaterLevel
Transmission Module
© NXP B.V. 2010. All rights reserved.
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