PN5120A0HN1/C2,151 NXP Semiconductors, PN5120A0HN1/C2,151 Datasheet - Page 74

• Manufacturer Part Number: PN5120A0HN1/C2,151
• Description: IC TRANSMISSION MOD 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN1/C2,151

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
111334
Product data sheet
Fig 23. Register read and write access
SA
SA
10.4.8 Register read access
SA
SO
ACK
Nack
(W)
(R)
Optional, if the previous access was on the same register address
SA
I2C slave address
I2C slave address
To read out data from a specific register address of the PN512 the host controller shall use
the procedure:
First a write access to the specific register address has to be performed as indicated in the
following frame.
The first byte of a frame indicates the device address according to the I
second byte indicates the register address. No data bytes are added.
The read/write bit shall be 0.
Having performed this write access, the read access can start. The host controller has to
send the device address of the PN512. As an answer to this the PN512 responds with the
content of this register. In one frame all n-data bytes could be read from the same register
address. This enables for example a fast FIFO access or register polling.
The read/write bit shall be set to logic 1.
A7-A0
A7-A0
sent by master
sent by slave
start condition
stop condition
acknowledge
not acknowlege
write cycle
read cycle
I2C slave address
A7-A0
(W)
0
(W)
0
Ack
Rev. 3.4 — 8 September 2009
Ack
(R)
1
Write Cycle
0
Ack
0
Read Cycle
0
0
[0..n]
address A5-A0
Joiner register
DATA
[7..0]
address A5-A0
Joiner register
DATA
[7..0]
0..n
Nack
Ack
Ack
Ack
[0..n]
SO
Transmission Module
SO
DATA
[7..0]
SO
© NXP B.V. 2010. All rights reserved.
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C rules. The
PN512
Ack
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