PN5120A0HN1/C2,151 NXP Semiconductors, PN5120A0HN1/C2,151 Datasheet - Page 11

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PN5120A0HN1/C2,151

Manufacturer Part Number
PN5120A0HN1/C2,151
Description
IC TRANSMISSION MOD 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheets

Specifications of PN5120A0HN1/C2,151

Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PN5120A0HN1/C2,151
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
111334
Product data sheet
Table 5.
Addr
(hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Page 3: TestRegister
0
1
2
3
4
5
6
7
8
9
A
B
C-F
Register Name
PageReg
CRCResultReg
GsNOffReg
ModWidthReg
TxBitPhaseReg
RFCfgReg
GsNOnReg
CWGsPReg
ModGsPReg
TModeReg
TPrescalerReg
TReloadReg
TCounterValReg Shows the 16-bit actual timer value
PageReg
TestSel1Reg
TestSel2Reg
TestPinEnReg
TestPin
ValueReg
TestBusReg
AutoTestReg
VersionReg
AnalogTestReg
TestDAC1Reg
TestDAC2Reg
TestADCReg
RFT
PN512 registers overview
Rev. 3.4 — 8 September 2009
Function
Selects the register page
Shows the actual MSB and LSB values of the CRC calculation
Selects the conductance of the antenna driver pins TX1 and TX2 for
modulation, when the driver is switched off
Controls the setting of the ModWidth
Adjust the TX bit phase at 106 kbit
Configures the receiver gain and RF level
Selects the conductance of the antenna driver pins TX1 and TX2 for
modulation when the drivers are switched on
Selects the conductance of the antenna driver pins TX1 and TX2 for
modulation during times of no modulation
Selects the conductance of the antenna driver pins TX1 and TX2 for
modulation during modulation
Defines settings for the internal timer
Describes the 16-bit timer reload value
selects the register page
General test signal configuration
General test signal configuration and PRBS control
Enables pin output driver on 8-bit parallel bus (Note: For serial
interfaces only)
Defines the values for the 8-bit parallel bus when it is used as I/O bus
Shows the status of the internal testbus
Controls the digital selftest
Shows the version
Controls the pins AUX1 and AUX2
Defines the test value for the TestDAC1
Defines the test value for the TestDAC2
Shows the actual value of ADC I and Q
Reserved for production tests
…continued
Transmission Module
© NXP B.V. 2010. All rights reserved.
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