AD9913/PCBZ Analog Devices Inc, AD9913/PCBZ Datasheet - Page 31

Eval Board

AD9913/PCBZ

Manufacturer Part Number
AD9913/PCBZ
Description
Eval Board
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Datasheet

Specifications of AD9913/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Direct Digital Synthesizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9913
Kit Contents
Board
Tool / Board Applications
D/A Converter
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9913
Primary Attributes
10-Bit DAC, 32-Bit Tuning Word Width
Secondary Attributes
250MHz, Graphical User Interface
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Linear Sweep Parameter Register
Address 0x06, 8 bytes are assigned to this register. This register is only effective if CFR1 [11] or CFR1 [28] are set. See the Auxiliary
Accumulator section.
Table 15. Bit Descriptions for Linear Sweep Limit Register
Bit(s)
63:32
31:0
Linear Sweep Delta Parameter Register
Address 0x07, 8 bytes are assigned to this register. This register is only effective if CFR1 [11] or CFR1 [28] are set. See the Auxiliary
Accumulator section.
Table 16. Bit Descriptions for Linear Sweep Step Size Register
Bit(s)
63:32
31:0
Linear Sweep Ramp Rate Register
Address 0x08, 4 bytes are assigned to this register. This register is only effective if CFR1 [11] or CFR1 [28] are set. See the Auxiliary
Accumulator section.
Table 17. Bit Descriptions for Linear Sweep Rate Register
Bit(s)
31:16
15:0
Profile Registers
There are eight consecutive serial I/O addresses dedicated to device profiles. In normal operation, the active profile register is selected
using the external profile select pins.
Profile 0 to Profile 7—Single Tone Register
Address 0x09 to Address 0x10, 6 bytes are assigned to these registers.
Table 18. Bit Descriptions for Profile 0 to Profile 7 Single Tone Register
Bit(s)
47:46
45:32
31:0
Bit Name
Sweep Parameter Word 1
Sweep Parameter Word 0
Bit Name
Falling Delta Word
Rising Delta Word
Bit Name
Falling Sweep Ramp Rate
Rising Sweep Ramp Rate
Bit Name
Open
Phase Offset Word
Frequency Tuning Word
Description
32-bit linear sweep upper limit value. In programmable modulus mode, these bits are used
to set the B value found in the AN-953 Application Note.
32-bit linear sweep lower limit value. In programmable modulus mode, these bits are used
to set the X value found in the AN-953 Application Note.
Description
32-bit linear sweep decrement step size value.
32-bit linear sweep increment step size value. In programmable modulus mode, these bits
are used to set the A value found in the AN-953 Application Note.
Description
16-bit linear sweep negative slope value that defines the time interval between decrement
values.
16-bit linear sweep positive slope value that defines the time interval between increment
values.
Description
Leave these bits at their default state.
This 14-bit number controls the DDS phase offset.
This 32-bit number controls the DDS frequency.
Rev. A | Page 31 of 32
AD9913

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