SI4800BDY-T1-E3 Vishay, SI4800BDY-T1-E3 Datasheet - Page 2

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SI4800BDY-T1-E3

Manufacturer Part Number
SI4800BDY-T1-E3
Description
N CHANNEL MOSFET, 30V, 9A, SOIC
Manufacturer
Vishay
Series
TrenchFET®r
Datasheet

Specifications of SI4800BDY-T1-E3

Transistor Polarity
N Channel
Continuous Drain Current Id
9A
Drain Source Voltage Vds
30V
On Resistance Rds(on)
18.5mohm
Rds(on) Test Voltage Vgs
10V
Threshold Voltage Vgs Typ
1.8V
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
18.5 mOhm @ 9A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
6.5A
Vgs(th) (max) @ Id
1.8V @ 250µA
Gate Charge (qg) @ Vgs
13nC @ 5V
Power - Max
1.3W
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Minimum Operating Temperature
- 55 C
Configuration
Single Quad Drain Triple Source
Resistance Drain-source Rds (on)
0.0185 Ohm @ 10 V
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
+/- 25 V
Continuous Drain Current
6.5 A
Power Dissipation
1300 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
SI4800BDY-T1-E3TR

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Si4800BDY
Vishay Siliconix
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
MOSFET SPECIFICATIONS T
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
b
a
a
a
a
Symbol
R
V
I
t
t
I
I
GS(th)
D(on)
DS(on)
V
Q
Q
d(on)
d(off)
GSS
J
DSS
g
Q
R
t
t
t
SD
rr
fs
gs
gd
r
f
= 25 °C, unless otherwise noted
g
g
V
V
I
DS
D
DS
I
≅ 1 A, V
F
= 30 V, V
V
V
= 15 V, V
V
V
= 2.3 A, dI/dt = 100 A/µs
V
DS
I
DS
V
V
V
S
DD
DS
DS
GS
Test Conditions
DS
GS
= 2.3 A, V
= 0 V, V
= V
= 30 V, V
≥ 5 V, V
= 15 V, R
= 4.5 V, I
= 10 V, I
= 15 V, I
GEN
GS
GS
GS
, I
= 10 V, R
= 0 V, T
GS
= 5.0 V, I
D
GS
GS
= 250 µA
GS
D
D
L
D
= ± 20 V
= 10 V
= 15 Ω
= 9 A
= 9 A
= 7 A
= 0 V
= 0 V
J
g
= 55 °C
D
= 6 Ω
= 9 A
Min.
0.8
0.5
30
0.0155
0.023
Typ.
0.75
8.7
1.5
3.5
1.4
16
12
32
14
30
7
S-83039-Rev. H, 29-Dec-08
Document Number: 72124
0.0185
± 100
0.030
Max.
1.8
1.2
2.2
13
15
20
50
25
60
1
5
Unit
µA
nC
nA
ns
V
A
Ω
S
V
Ω

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