PIC18C601-I/L Microchip Technology, PIC18C601-I/L Datasheet - Page 314

• Manufacturer Part Number: PIC18C601-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C601-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT68L1 - SOCKET TRANSITION ICE 68PLCCAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C601I/L

PIC18C601/801
Timing Diagrams and Specifications ............................... 275
TRISE Register ................................................................ 113
TSTFSZ ........................................................................... 257
Two-Word Instructions ....................................................... 48
TXSTA Register ............................................................... 177
U
Universal Synchronous Asynchronous
Receiver Transmitter. See USART
USART ............................................................................. 177
DS39541A-page 314
A/D Conversion ........................................................ 293
Capture/Compare/PWM (CCP) ............................... 282
CLKOUT and I/O ..................................................... 276
External Clock .......................................................... 275
I
I
Oscillator Start-up Timer (OST) ............................... 280
Power-up Timer (PWRT) ......................................... 280
RESET ..................................................................... 280
Timer0 and Timer1 .................................................. 281
USART Synchronous Receive
USART Synchronous Transmission
Watchdog Timer (WDT) ........................................... 280
BRGH Bit ................................................................. 179
Asynchronous Mode ................................................ 183
Baud Rate Generator (BRG) ................................... 179
Serial Port Enable (SPEN Bit) ................................. 177
Synchronous Master Mode ...................................... 187
Synchronous Slave Mode ........................................ 190
2
2
C Bus Data ............................................................ 287
C Bus START/STOP Bits ...................................... 287
Master Transmission ....................................... 184
Receive Block Diagram ................................... 185
Reception ........................................................ 186
Registers Associated with Reception .............. 186
Registers Associated with Transmission ......... 184
Transmit Block Diagram .................................. 183
Baud Rate Error, Calculating ........................... 179
Baud Rate Formula ......................................... 179
High Baud Rate Select (BRGH Bit) ................. 179
Sampling .......................................................... 179
Reception ........................................................ 189
Registers Associated with Reception .............. 189
Registers Associated with Transmission ......... 187
Timing Diagram,
Timing Diagram,
Transmission ................................................... 188
Registers Associated with Reception .............. 191
Registers Associated with Transmission ......... 190
(Master/Slave) ......................................... 291
(Master/Slave) ......................................... 291
Synchronous Receive ..................... 291
Synchronous Transmission ............. 291
Advance Information
W
Wake-up from SLEEP .............................................207
Watchdog Timer (WDT) ..........................................207
Waveform for General Call Address Sequence .............. 162
WCOL ............................................................. 165
WCOL Status Flag .......................................................... 165
Worldwide Sales and Service .......................................... 318
WWW, On-Line Support ..............................................7
X
XORLW ........................................................................... 257
XORWF ........................................................................... 258
Timing Diagram ....................................................... 213
Associated Registers ............................................... 211
Block Diagram ......................................................... 211
Postscaler. See Postscaler, WDT
Programming Considerations .................................. 210
RC Oscillator ........................................................... 210
Time-out Period ....................................................... 210
Timing Diagram ....................................................... 280
WDTCON Register .................................................. 210
2001 Microchip Technology Inc.
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