PIC18C601-I/L Microchip Technology, PIC18C601-I/L Datasheet - Page 121

• Manufacturer Part Number: PIC18C601-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C601-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT68L1 - SOCKET TRANSITION ICE 68PLCCAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C601I/L

9.8
PORTH is an 8-bit wide, bi-directional I/O port. The cor-
responding data direction register is TRISH. Setting a
TRISH bit (= 1) will make the corresponding PORTH
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISH bit (= 0) will
make the corresponding PORTH pin an output (i.e., put
the contents of the output latch on the selected pin).
Read-modify-write operations on the LATH register
read and write the latched output value for PORTH.
Pins RH7:RH4 are multiplexed with analog inputs
AN18:AN11, while pins RH3:RH0 are multiplexed with
system address bus A19:A16. By default, pins
RH7:RH4 will setup as A/D inputs and pins RH3:RH0
will setup as system address bus. Register ADCON1
configures RH7:RH4 as I/O or A/D inputs. Register
MEMCON configures RH3:RH0 as I/O or system bus
pins.
EXAMPLE 9-9:
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
Note:
2001 Microchip Technology Inc.
Note 1: On
PORTH, LATH, and TRISH
Registers
2: On
PORTH
LATH
0Fh
ADCON1
0CFh
TRISH
PORTH is available only on PIC18C801
devices.
RH7:RH4 default to A/D inputs and read
as ’0’.
RH3:RH0 default to system bus signals.
Power-on
Power-on
INITIALIZING PORTH
; Initialize PORTH by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
;
;
; Value used to
; initialize data
; direction
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs
Reset,
Reset,
PORTH
PORTH
Advance Information
pins
pins
FIGURE 9-16:
FIGURE 9-17:
WR TRISH
WR TRISH
WR LATH
or
PORTH
WR LATH
or
PORTH
Note 1: I/O pins have diode protection to V
Note 1: I/O pins have diode protection to V
Data
Bus
Data
Bus
RD PORTH
RD PORTH
To A/D Converter
PIC18C601/801
TRIS Latch
TRIS Latch
Data Latch
Data Latch
RD LATH
RD LATH
D
D
D
D
CK
CK
CK
CK
RD TRISH
RD TRISH
Q
Q
RH3:RH0 PINS BLOCK
DIAGRAM IN I/O MODE
RH7:RH4 PINS BLOCK
DIAGRAM
Q
Q
Q
Q
EN
EN
EN
Schmitt
Trigger
Input
Buffer
EN
Schmitt
Trigger
Input
Buffer
DS39541A-page 121
D
D
DD
DD
and V
and V
I/O pin
I/O pin
SS
SS
(1)
(1)
.
.