DSPIC30F6010-20E/PF Microchip Technology, DSPIC30F6010-20E/PF Datasheet - Page 87

• Manufacturer Part Number: DSPIC30F6010-20E/PF
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-20E/PF

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TQFP, 80-VQFP
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F601020EPF

14.0
This section describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining mechanical position data.
FIGURE 14-1:
© 2007 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the dsPIC30F Family Reference
Manual (DS70046). For more information on the device
instruction set and programming, refer to the “dsPIC30F/
33F Programmer’s Reference Manual” (DS70157).
Note: In dsPIC30F4011/4012, the UPDN pin is not available. Up/Down logic bit can still be polled by software.
INDX
QEA
QEB
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
Synchronize
Sleep Input
Det
UPDN_SRC
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
Programmable
Programmable
Programmable
0
1
Digital Filter
Digital Filter
Digital Filter
QEICON<11>
3
Up/Down
T
QEIM<2:0>
CY
Interface Logic
TQCS
Quadrature
Encoder
0
1
QEIM<2:0>
Mode Select
3
TQGATE
1
0
2
The operational features of the QEI include:
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate
Figure 14-1 depicts the Quadrature Encoder Interface
block diagram.
index pulse
dsPIC30F4011/4012
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(MAXCNT)
(POSCNT)
TQCKPS<1:0>
Q
Q
1, 8, 64, 256
Prescaler
bits
2
QEIM<2:0>
Reset
Equal
(QEICON<10:8>).
DS70135E-page 85
QEIIF
Event
Flag