CS5501-BS Cirrus Logic Inc, CS5501-BS Datasheet - Page 36

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CS5501-BS

Manufacturer Part Number
CS5501-BS
Description
A/D Converter (A-D) IC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5501-BS

Peak Reflow Compatible (260 C)
No
No. Of Bits
16 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
Interface Type
Serial
Package / Case
20-SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5501-BS
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
CS5501-BSZ
Manufacturer:
CIRRUS
Quantity:
20 000
Notes:
Assumptions:
Notes:
Assumptions:
36
1. CS5501 in Synchronous External Clocking mode.
2. Using 68HC11’s SPI port. (Can use SCI and
3. Maximum bit rate is 1.05 Mbps.
1. PA6 used as CS.
2. 68HC11 in single-chip mode.
3. Receive data via polling.
4. Normal equates for peripheral registers.
5. Data returned in register D.
1. CS5501 in Synchronous External Clocking mode.
2. COPS 444 max baud = 62.5 kbps. (Others = 500 kbps)
3. See timing diagram for detailed timing.
1. G0 used as CS.
2. Register 0 (upper four nibbles) used to store 16-bit word.
Figure A3. 68HC11/CS5501 Serial Interface
CS5501’s Asynchronous mode.)
MODE
MODE
CS5501
CS5503
CS5501
CS5503
Figure A4. COPS/CS5501 Interface
SDATA
SDATA
SCLK
SCLK
CS
CS
PA6
SCK
MISO
G0
SK
DI
68HC11
COPS 444
(68HC05)
(All COPS)
SS
+5V
Initial Code:
SPINIT: PSHA
Code to get word of data:
SP_IN:
WAIT1: LDAA SPSR
WAIT2: LDAB SPSR
Initial Code:
SPINIT: OGI
Code to get word of data:
SP_IN:
GETNIB: NOP
LDAA #%x1xxxxxx ; Bit 6 = 1, all others are don’t cares
STAA PORTA
LDAA #$10
STAA SPCR
LDAA #%xx0110xx ; SS-input, SCK-output,
STAA DDRD
LDAA #$50
STAA SPCR
LDAA SPSR
LDAA SPDR
PULA
RTS
LDAA #%x0xxxxxx ;
STAA PORTA
STAA SPDR
BPL
LDAA SPDR
STAA SPDR
BPL
LDAB #%x1xxxxxx ;
STAB PORTA
LDAB SPDR
RTS
RC
XAS
LBI
SC
OGI
LEI
XAS
NOP
NOP
XAS
XIS
JP
RC
XAS
OGI
RET
WAIT1
WAIT2
15
0,12
14
0
GETNIB
15
; Store temporary copy of A
; CS = 1, inactive; deselect CS5501
;
; Disable serial port
; MOSI-output, MISO-input
; Data direction register for port D
; Enable serial port, CMOS outputs,
; master, highest clock rate (int. clk/2)
;
; Bogus read to clr port and SPIF flag
; Restore A
;
; CS = 0, active; select CS5501
; Put data in serial port to start clk
; Get port status
; If SPIF (MSB) 0, no data yet, wait
; Put most significant byte in A
; Start serial port for second byte
; Get port status
; If SPIF (MSB) 0, no data yet, wait
; CS = 1, inactive; deselect CS5501
; Put least significant byte in B
;
; CS = 1, inactive; deselect CS5501
; Reset carry, used in next
; instruction to turn SK off
; Point to start of data
; storage location
; Set carry - enables SK in
; XAS instruction
; CS = 0, active; select CS5501
; Shift register mode, S0 = 0
; Start clocking serial port
;
; Wait for (first) M.S. nibble
;
; Get nibble of data from SIO
; Put nibble in memory, inc. pointer,
; if overflow, jump around this inst.
; Reset carry - disables SK in XAS
; instruction
; Bogus read - stops SK
; CS = 1, inactive; deselect CS5501
;
CS5501/CS5503
DS31F2

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