AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 90

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AU80610004392AAS LBLA

Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet

Specifications of AU80610004392AAS LBLA

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.7.10
90
DMIVC1RSTS - DMI VC1 Resource Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Reports the Virtual Channel specific status.
15:2
7:1
Bit
Bit
0
1
0
Access
Access
RW
RO
RO
RO
RO
Default
Default
0000h
Value
Value
00h
0b
1b
0b
RST/
RST/
PWR
PWR
Core
Core
Core
Core
Core
0/0/0/DMIBAR
26-27h
0002h
16 bits
RO;
0: The VC negotiation is complete.
Traffic Class / Virtual Channel 1 Map
(TCVC1M):
Indicates the TCs (Traffic Classes) that are
mapped to the VC resource. Bit locations within
this field correspond to TC values.
example, when bit 7 is set in this field, TC7 is
mapped to this VC resource. When more than
one bit in this field is set, it indicates that
multiple TCs are mapped to the VC resource. In
order to remove one or more TCs from the
TC/VC Map of an enabled VC, software must
ensure that no new or outstanding transactions
with the TC labels are targeted at the given
Link.
Traffic Class 0 / Virtual Channel 1 Map
(TC0VC1M):
Reserved ():
Virtual Channel 1 Negotiation Pending
(VC1NP):
1:The VC resource is still in the process of
negotiation (initialization or disabling).
Software may use this bit when enabling or
disabling the VC. This bit indicates the status of
the process of Flow Control initialization. It is set
by default on Reset, as well as whenever the
corresponding Virtual Channel is Disabled or the
Link is in the DL_Down state. It is cleared when
the link successfully exits the FC_INIT2 state.
Before using a Virtual Channel, software must
check whether the VC Negotiation Pending fields
for that Virtual Channel are cleared in both
Components on a Link.
Reserved ()
Traffic Class 0 is always routed to VC0.
Processor Configuration Registers
Description
Description
For
Datasheet

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