AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 59

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
1.5.34
1.5.35
Datasheet
TSEGMB - TSEG Memory Base
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the base address of TSEG DRAM memory. BIOS determines the
base of TSEG memory by subtracting the TSEG size (PCI Device 0 offset 9E bits
02:01) from graphics GTT stolen base (PCI Device 0 offset A8 bits 31:20).
Once D_LCK has been set, these bits becomes read only.
TOLUD - Top of Low Usable DRAM
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This 16 bit register defines the Top of Low Usable DRAM. TSEG, GTT Graphics Memory
and Graphics Stolen Memory are within the DRAM space defined. From the top, CPU
Uncore optionally claims 1 to 64MBs of DRAM for internal graphics if enabled 1, 2MB
of DRAM for GTT Graphics Stolen Memory (if enabled) and 1, 2, or 8 MB of DRAM for
TSEG if enabled.
Programming Example :
31:20
19:0
Bit
⎯ C1DRB3 is set to 4GB
⎯ TSEG is enabled and TSEG size is set to 1MB
⎯ Internal Graphics is enabled and Graphics Mode Select set to 32MB
⎯ GTT Graphics Stolen Memory Size set to 2MB
⎯ BIOS knows the OS requires 1G of PCI space.
Access
RW/L
RO
Default
00000h
Value
000h
RST/
PWR
Core
Core
0/0/0/PCI
AC-AFh
00000000h
32 bits
0/0/0/PCI
B0-B1h
0010h
16 bits
RW/L; RO;
RW/L; RO;
Once D_LCK has been set, these bits become read only.
TESG Memory base (TSEGMB):
This register contains bits 31 to 20 of the base address of
TSEG DRAM memory. BIOS determines the base of TSEG
memory by subtracting the TSEG size (PCI Device 0 offset
9E bits 02:01) from graphics GTT stolen base (PCI Device
0 offset A8 bits 31:20).
Reserved ()
Description
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