AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 23

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
1.2.7.2
1.2.7.3
Datasheet
Table 1-5. SMM Space Table
Note: The Compatible SMM space must not be set-up as cacheable.
Compatible Transaction Address (Adr C)
High Transaction Address (Adr H)
TSEG Transaction Address (Adr T)
These abbreviations are used later in the table describing SMM Space Transaction
Handling.
SMM Space Restrictions
If any of the following conditions are violated the results of SMM accesses are
unpredictable and may cause the system to hang:
High or TSEG SMM transaction address space must not overlap address space
assigned to system DRAM, or to any “PCI” devices (including DMI Interface, PCI-
Express, and graphics devices). This is a BIOS responsibility.
Both D_OPEN and D_CLOSE must not be set to 1 at the same time.
When TSEG SMM space is enabled, the TSEG space must not be reported to the OS
as available DRAM. This is a BIOS responsibility.
Any address translated through the GMADR TLB must not target DRAM from A_0000-
F_FFFF.
SMM Space Combinations
When High SMM is enabled (G_SMRAME=1 and H_SMRAM_EN=1) the Compatible
SMM space is effectively disabled. CPU originated accesses to the Compatible SMM
space are forwarded to the DMI Interface. DMI Interface originated accesses are
never allowed to access SMM space.
Compatible (C)
High (H)
TSEG (T)
G_SMRAME
SMM Space Enabled
Enable
Global
0
1
1
1
H_SMRAM_EN
High Enable
X
0
0
1
000A_0000h to 000B_FFFFh
FEDA_0000h to FEDB_FFFFh
(TOLUD-STOLEN-TSEG) to
TOLUD-STOLEN
Transaction Address
Space
TSEG_EN
Enable
TSEG
X
0
1
0
Compatible
(C) Range
000A_0000h to 000B_FFFFh
000A_0000h to 000B_FFFFh
(TOLUD-STOLEN-TSEG) to
TOLUD-STOLEN
Disabled
Disable
Enable
Enable
DRAM Space (DRAM)
Disable
Disable
Range
Disable
Enable
High
(H)
Disable
Disable
Disable
Range
Enable
TSEG
(T)
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