AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 125

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AU80610004392AAS LBLA

Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet

Specifications of AU80610004392AAS LBLA

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Processor Configuration Registers
1.9.32
1.9.33
Datasheet
MA - Message Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
MD - Message Data
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:2
15:0
1:0
Bit
Bit
Bit
0
Access
Access
Access
RW
RW
RW
RO
00000000
Default
Default
Default
Value
Value
Value
0000h
00b
0b
h
MSI Enable (MSIEN):
MSIs.
Message Address (MESSADD):
Used by system software to assign an MSI
address to the device.
The device handles an MSI by writing the
padded contents of the MD register to this
address.
Force Dword Align (FDWORD):
system software are always aligned on a
DWORD address boundary.
Message Data (MESSDATA):
software and used to handle an MSI from the
device.
When the device must generate an interrupt
request, it writes a 32-bit value to the memory
address specified in the MA register. The upper
16 bits are always set to 0. The lower 16 bits
are supplied by this register.
Controls the ability of this device to generate
Base message data pattern assigned by system
Hardwired to 0 so that addresses assigned by
0/2/0/PCI
94-97h
00000000h
32 bits
0/2/0/PCI
98-99h
0000h
16 bits
RW; RO;
RW;
Description
Description
Description
125

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