UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 84
UPD78F0886GA(A)-GAM-AX
Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet
1.UPD78F0886GAA-GAM-AX.pdf
(129 pages)
Specifications of UPD78F0886GA(A)-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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84
[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
ADJBS
None
• The A register, CY flag and AC flag are decimally adjusted from their contents. This instruction carries out
• If the adjustment result shows that the A register contents are 0, the Z flag is set (1). In all other cases,
an operation having meaning only when the BCD (binary coded decimal) data is subtracted and the
subtraction result is stored in the A register (in all other cases, the instruction carries out an operation having
no meaning).
See the table below for the adjustment method.
the Z flag is cleared (0).
Z
×
AC = 0
AC = 1
AC
×
Condition
ADJBS
Decimal Adjust Accumulator for Subtraction
CY
×
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
CY = 0
CY = 1
CY = 0
CY = 1
User's Manual U12326EJ4V0UM
A ← A, CY ← 0, AC ← 0
A ← A–01100000B, CY ← 1, AC ← 0
A ← A–00000110B, CY ← 0, AC ← 0
A ← A–01100110B, CY ← 1, AC ← 0
Decimal Adjustment of Subtraction Result
Decimal Adjust Register for Subtraction
Operation
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