UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 115
UPD78F0886GA(A)-GAM-AX
Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet
1.UPD78F0886GAA-GAM-AX.pdf
(129 pages)
Specifications of UPD78F0886GA(A)-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
[Description example]
DBNZ
• One is subtracted from the destination operand (dst) contents specified by the 1st operand and the
• If the subtraction result is not 0, data is branched to the address indicated with the 2nd operand ($addr16).
• The flag remains unchanged.
DBNZ B, $1215H; The B register contents are decremented. If the result is not 0, data is branched to 1215H
subtraction result is stored in the destination operand (dst).
When the subtraction result is 0, no processing is carried out and the subsequent instruction is executed.
Mnemonic
Z
DBNZ
AC
B, $addr16
C, $addr16
saddr, $addr16
(with the start of this instruction set in the range of addresses 1194H to 1293H).
Operand(dst,$addr16)
DBNZ dst, $addr16
dst ← dst–1,
then PC ← PC+b+jdisp16 if dst R1
CY
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
b(Number of bytes)
2
2
3
≠
0
Decrement and Branch if Not Zero
Conditional Loop (R1
≠
0)
115
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