UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 20

• Manufacturer Part Number: UPD78F0886GA(A)-GAM-AX
• Description: 8BIT MCU, 60K FLASH, 3KB RAM, CAN
• Manufacturer: NEC

Specifications of UPD78F0886GA(A)-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm Channels: 6
• Digital Ic Case Style: LQFP
• Core Size: 8bit
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.1 Instruction Address Addressing
incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each
time another instruction is executed. When a branch instruction is executed, the branch destination information
is set to the PC and branched by the following addressing (for details of each instruction, refer to CHAPTER 5
EXPLANATION OF INSTRUCTIONS).
3.1.1 Relative addressing
20
An instruction address is determined by program counter (PC) contents. The PC contents are normally
[Function]
[Illustration]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to
the start address of the following instruction is transferred to the program counter (PC) and branched. The
displacement value is treated as signed two’s complement data (–128 to +127) and bit 7 becomes a sign
bit. In other words, in relative addressing, the value is relatively transferred to the range between –128 and
+127 from the start address of the following instruction.
This function is carried out when the “BR $addr16” instruction or a conditional branch instruction is executed.
PC
15
15
15
When S = 0,
When S = 1,
indicates all bits "0".
indicates all bits "1".
CHAPTER 3 ADDRESSING
User's Manual U12326EJ4V0UM
8
PC
+
7
S
6
jdisp8
0
0
0
... PC is the start address of
the next instruction of
a BR instruction.