UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 55

8BIT MCU, 60K FLASH, 3KB RAM, CAN

UPD78F0886GA(A)-GAM-AX

Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet

Specifications of UPD78F0886GA(A)-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
[Description example]
ADD
• The destination operand (dst) specified by the 1st operand is added to the source operand (src) specified
• If the addition result shows that dst is 0, the Z flag is set (1). In all other cases, the Z flag is cleared (0).
• If the addition generates a carry out of bit 7, the CY flag is set (1). In all other cases, the CY flag is cleared
• If the addition generates a carry for bit 4 out of bit 3, the AC flag is set (1). In all other cases, the AC flag
ADD CR10, #56H; 56H is added to the CR10 register and the result is stored in the CR10 register.
Note Except r = A
by the 2nd operand and the result is stored in the CY flag and the destination operand (dst).
(0).
is cleared (0).
Mnemonic
Z
×
ADD
AC
×
A, #byte
saddr, #byte
A, r
r, A
A, saddr
dst, CY ← dst + src
ADD dst, src
CY
×
Operand(dst,src)
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
Note
Mnemonic
ADD
A, !addr16
A, [HL]
A, [HL+byte]
A, [HL+B]
A, [HL+C]
Operand(dst,src)
Byte Data Addition
Add
55

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